21 Oct
2015
21 Oct
'15
6:37 p.m.
On 10/05/2015 04:58 PM, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
Implement the procedure that the TRM mandates to initialize PLLREFE and PLLE. This makes the PLL actually lock.
Note that this section of the TRM is being cleaned up to remove some confusion. The set of register accesses in this patch should be final, although the step numbers/descriptions might still change.
Tom,
Is this patch OK? I assume it can be applied now the merge window is over?