Hello,
I need to reconfigure PCIe settings to connect a GPU. From config header files, the variables I changed are below. I did exact same changes to linux .dts file.
But when I power on the board, u-boot is freezing during gpu driver initialization (after reading BAR registers). I also tried some other configs but sometimes I got machine check error, sometimes local access memory (LAW) error and so on..
My question is, how should I increase the memory map size of PCIE2. I just want to increase it to 512 MB without crashing some other things ?
And also, I want to know what are these MEM_VIRT, MEM_BUS,_MEM PHYS and IO_VIRT, IO_BUS and IO_PHYS ?
Thanks, Regards.
#ifdef CONFIG_PCI /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #ifdef CONFIG_PCIE1 #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull #define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ #endif
/* controller 2, Slot 2, tgtid 2, Base address 201000 */ #ifdef CONFIG_PCIE2 #define CONFIG_SYS_PCIE2_MEM_VIRT 0x90000000 #define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc10000000ull #define CONFIG_SYS_PCIE2_MEM_SIZE* 0x20000000 /* INCREASED TO 512 MB*/* #define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ #endif
/* controller 3, Slot 1, tgtid 1, Base address 202000 */ #ifdef CONFIG_PCIE3 #define CONFIG_SYS_PCIE3_MEM_VIRT *0xb0000000 /* I changed this to 0xb0000000 instead of 0xa0000000 because PCIE2 end adress is changed to 512 MB from 256 MB */* #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS *0xc30000000ull* #define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ #endif
/* controller 4, Base address 203000 */ #ifdef CONFIG_PCIE4 #define CONFIG_SYS_PCIE4_MEM_VIRT *0xc0000000 /* b -> c */* #define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS *0xc40000000ull* #define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000 #define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE4_IO_PHYS 0xff830000ull #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #endif