Reviewed-by: Dennis Gilmore dennis@ausil.us Tested-by: Dennis Gilmore dennis@ausil.us
On Thu, 2018-06-14 at 18:17 +0300, Baruch Siach wrote:
From: Jon Nettleton jon@solid-run.com
This makes changes so the u-boot dts file is structured more similar to the mainline linux dtsi file. It provides a minimal common dts that can work for most boards based on the ClearFog platform. Ethernet support is only supported for eth0 however all devices are left enabled so u-boot can generate and provide mac addresses for all of the network interfaces.
Signed-off-by: Jon Nettleton jon@solid-run.com [baruch: rebase on recent changes] Signed-off-by: Baruch Siach baruch@tkos.co.il
arch/arm/dts/armada-388-clearfog.dts | 386 +++++++++++------------
1 file changed, 151 insertions(+), 235 deletions(-)
diff --git a/arch/arm/dts/armada-388-clearfog.dts b/arch/arm/dts/armada-388-clearfog.dts index 1403600e5b02..16a47d59e667 100644 --- a/arch/arm/dts/armada-388-clearfog.dts +++ b/arch/arm/dts/armada-388-clearfog.dts @@ -81,174 +81,6 @@
soc { internal-regs {
ethernet@30000 {mac-address = [00 50 43 02 02 02];phy-mode = "sgmii";status = "okay";fixed-link {speed = <1000>;full-duplex;};};ethernet@34000 {mac-address = [00 50 43 02 02 03];managed = "in-band-status";phy-mode = "sgmii";status = "okay";};i2c@11000 {/* Is there anything on this? */clock-frequency = <100000>;pinctrl-0 = <&i2c0_pins>;pinctrl-names = "default";status = "okay";/** PCA9655 GPIO expander, up to 1MHzclock.
* 0-CON3 CLKREQ#* 1-CON3 PERST#* 2-CON2 PERST#* 3-CON3 W_DISABLE* 4-CON2 CLKREQ#* 5-USB3 overcurrent* 6-USB3 power* 7-CON2 W_DISABLE* 8-JP4 P1* 9-JP4 P4* 10-JP4 P5* 11-m.2 DEVSLP* 12-SFP_LOS* 13-SFP_TX_FAULT* 14-SFP_TX_DISABLE* 15-SFP_MOD_DEF0*/expander0: gpio-expander@20 {/** This is how it should be:* compatible ="onnn,pca9655",
* "nxp,pca9555";* but you can't do thisbecause of
* the way I2C works.*/compatible = "nxp,pca9555";gpio-controller;#gpio-cells = <2>;reg = <0x20>;pcie1_0_clkreq {gpio-hog;gpios = <0GPIO_ACTIVE_LOW>;
input;line-name ="pcie1.0-clkreq";
};pcie1_0_w_disable {gpio-hog;gpios = <3GPIO_ACTIVE_LOW>;
output-low;line-name ="pcie1.0-w-disable";
};pcie2_0_clkreq {gpio-hog;gpios = <4GPIO_ACTIVE_LOW>;
input;line-name ="pcie2.0-clkreq";
};pcie2_0_w_disable {gpio-hog;gpios = <7GPIO_ACTIVE_LOW>;
output-low;line-name ="pcie2.0-w-disable";
};usb3_ilimit {gpio-hog;gpios = <5GPIO_ACTIVE_LOW>;
input;line-name = "usb3-current-limit";
};usb3_power {gpio-hog;gpios = <6GPIO_ACTIVE_HIGH>;
output-high;line-name = "usb3-power";
};m2_devslp {gpio-hog;gpios = <11GPIO_ACTIVE_HIGH>;
output-low;line-name = "m.2devslp";
};};/* The MCP3021 is 100kHz clock only*/
mikrobus_adc: mcp3021@4c {compatible ="microchip,mcp3021";
reg = <0x4c>;};/* Also something at 0x64 */};i2c@11100 {/** Routed to SFP, mikrobus, andPCIe.
* SFP limits this to 100kHz, andrequires
* an AT24C01A/02/04 with addresspins tied
* low, which takes addresses 0x50and 0x51.
* Mikrobus doesn't specify beyondan I2C
* bus being present.* PCIe uses ARP to assignaddresses, or
* 0x63-0x64.*/clock-frequency = <100000>;pinctrl-0 = <&clearfog_i2c1_pins>;pinctrl-names = "default";status = "okay";};pinctrl@18000 {clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
marvell,pins = "mpp46";marvell,function = "ref";};clearfog_dsa0_pins: clearfog-dsa0-pins {
marvell,pins = "mpp23","mpp41";
marvell,function = "gpio";};clearfog_i2c1_pins: i2c1-pins {/* SFP, PCIe, mSATA,mikrobus */
marvell,pins = "mpp26","mpp27";
marvell,function = "i2c1";};clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
marvell,pins = "mpp20";marvell,function = "gpio";};clearfog_spi1_cs_pins: spi1-cs-pins{
marvell,pins = "mpp55";marvell,function = "spi1";};mikro_pins: mikro-pins {/* int: mpp22 rst: mpp29 */marvell,pins = "mpp22","mpp29";
marvell,function = "gpio";};mikro_spi_pins: mikro-spi-pins {marvell,pins = "mpp43";marvell,function = "spi1";};mikro_uart_pins: mikro-uart-pins {marvell,pins = "mpp24","mpp25";
marvell,function = "ua1";};rear_button_pins: rear-button-pins {marvell,pins = "mpp34";marvell,function = "gpio";};};rtc@a3800 { /* * If the rtc doesn't work, run"date reset" @@ -297,7 +129,8 @@ status = "okay"; };
usb3@f8000 {
usb0: usb3@f8000 {/* CON7, USB-A port on back ofdevice */ status = "okay"; }; }; @@ -321,72 +154,6 @@ }; };
- sfp: sfp {
compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;moddef0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;sfp,ethernet = <ð2>;tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;- };
- dsa@0 {
compatible = "marvell,dsa";dsa,ethernet = <ð1>;dsa,mii-bus = <&mdio>;pinctrl-0 = <&clearfog_dsa0_clk_pins&clearfog_dsa0_pins>;
pinctrl-names = "default";#address-cells = <2>;#size-cells = <0>;switch@0 {#address-cells = <1>;#size-cells = <0>;reg = <4 0>;port@0 {reg = <0>;label = "lan1";};port@1 {reg = <1>;label = "lan2";};port@2 {reg = <2>;label = "lan3";};port@3 {reg = <3>;label = "lan4";};port@4 {reg = <4>;label = "lan5";};port@5 {reg = <5>;label = "cpu";};port@6 {/* 88E1512 external phy */reg = <6>;label = "lan6";fixed-link {speed = <1000>;full-duplex;};};};- };
- gpio-keys { compatible = "gpio-keys"; pinctrl-0 = <&rear_button_pins>;
@@ -406,6 +173,155 @@ status = "okay"; };
+ð1 {
- managed = "in-band-status";
- phy-mode = "sgmii";
- status = "okay";
+};
+ð2 {
- phy-mode = "sgmii";
- status = "okay";
+};
+&i2c0 {
- clock-frequency = <400000>;
- pinctrl-0 = <&i2c0_pins>;
- pinctrl-names = "default";
- status = "okay";
- /*
* PCA9655 GPIO expander, up to 1MHz clock.* 0-CON3 CLKREQ#* 1-CON3 PERST#* 2-CON2 PERST#* 3-CON3 W_DISABLE* 4-CON2 CLKREQ#* 5-USB3 overcurrent* 6-USB3 power* 7-CON2 W_DISABLE* 8-JP4 P1* 9-JP4 P4* 10-JP4 P5* 11-m.2 DEVSLP* 12-SFP_LOS* 13-SFP_TX_FAULT* 14-SFP_TX_DISABLE* 15-SFP_MOD_DEF0*/- expander0: gpio-expander@20 {
/** This is how it should be:* compatible = "onnn,pca9655",* "nxp,pca9555";* but you can't do this because of* the way I2C works.*/compatible = "nxp,pca9555";gpio-controller;#gpio-cells = <2>;reg = <0x20>;pcie1_0_clkreq {gpio-hog;gpios = <0 GPIO_ACTIVE_LOW>;input;line-name = "pcie1.0-clkreq";};pcie1_0_w_disable {gpio-hog;gpios = <3 GPIO_ACTIVE_LOW>;output-low;line-name = "pcie1.0-w-disable";};pcie2_0_clkreq {gpio-hog;gpios = <4 GPIO_ACTIVE_LOW>;input;line-name = "pcie2.0-clkreq";};pcie2_0_w_disable {gpio-hog;gpios = <7 GPIO_ACTIVE_LOW>;output-low;line-name = "pcie2.0-w-disable";};usb3_ilimit {gpio-hog;gpios = <5 GPIO_ACTIVE_LOW>;input;line-name = "usb3-current-limit";};usb3_power {gpio-hog;gpios = <6 GPIO_ACTIVE_HIGH>;output-high;line-name = "usb3-power";};m2_devslp {gpio-hog;gpios = <11 GPIO_ACTIVE_HIGH>;output-low;line-name = "m.2 devslp";};- };
- mikrobus_adc: mcp3021@4c {
compatible = "microchip,mcp3021";reg = <0x4c>;- };
+};
+&i2c1 {
- /*
* Routed to SFP, mikrobus, and PCIe.* SFP limits this to 100kHz, and requires* an AT24C01A/02/04 with address pins tied* low, which takes addresses 0x50 and 0x51.* Mikrobus doesn't specify beyond an I2C* bus being present.* PCIe uses ARP to assign addresses, or* 0x63-0x64.*/- clock-frequency = <100000>;
- pinctrl-0 = <&clearfog_i2c1_pins>;
- pinctrl-names = "default";
- status = "okay";
+};
+&pinctrl {
- clearfog_i2c1_pins: i2c1-pins {
/* SFP, PCIe, mSATA, mikrobus */marvell,pins = "mpp26", "mpp27";marvell,function = "i2c1";- };
- clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
marvell,pins = "mpp20";marvell,function = "gpio";- };
- clearfog_spi1_cs_pins: spi1-cs-pins {
marvell,pins = "mpp55";marvell,function = "spi1";- };
- mikro_pins: mikro-pins {
/* int: mpp22 rst: mpp29 */marvell,pins = "mpp22", "mpp29";marvell,function = "gpio";- };
- mikro_spi_pins: mikro-spi-pins {
marvell,pins = "mpp43";marvell,function = "spi1";- };
- mikro_uart_pins: mikro-uart-pins {
marvell,pins = "mpp24", "mpp25";marvell,function = "ua1";- };
- rear_button_pins: rear-button-pins {
marvell,pins = "mpp34";marvell,function = "gpio";- };
+};
/* +#define A38x_CUSTOMER_BOARD_1_MPP16_23 0x00400011 MPP18: gpio ? (pca9655 int?)