RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and qual-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/Kconfig | 3 -- arch/arm/mach-rockchip/Kconfig | 25 +++++++++- arch/arm/mach-rockchip/Makefile | 2 +- arch/arm/mach-rockchip/rk3399/Kconfig | 19 ++++++++ arch/arm/mach-rockchip/rk3399/Makefile | 5 ++ board/rockchip/evb_rk3399/Kconfig | 15 ++++++ board/rockchip/evb_rk3399/MAINTAINERS | 0 board/rockchip/evb_rk3399/Makefile | 7 +++ board/rockchip/evb_rk3399/evb-rk3399.c | 41 +++++++++++++++++ include/configs/evb_rk3399.h | 24 ++++++++++ include/configs/rk3399_common.h | 84 ++++++++++++++++++++++++++++++++++ 11 files changed, 220 insertions(+), 5 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3399/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3399/Makefile create mode 100644 board/rockchip/evb_rk3399/Kconfig create mode 100644 board/rockchip/evb_rk3399/MAINTAINERS create mode 100644 board/rockchip/evb_rk3399/Makefile create mode 100644 board/rockchip/evb_rk3399/evb-rk3399.c create mode 100644 include/configs/evb_rk3399.h create mode 100644 include/configs/rk3399_common.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8a9cfcc..6e4d78a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -846,10 +846,7 @@ config STM32
config ARCH_ROCKCHIP bool "Support Rockchip SoCs" - select SUPPORT_SPL - select SPL select OF_CONTROL - select CPU_V7 select DM
config TARGET_THUNDERX_88XX diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 2a8afac..2a739ea 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -1,5 +1,8 @@ if ARCH_ROCKCHIP
+config RK_TIMER + bool + config ROCKCHIP_RK3288 bool "Support Rockchip RK3288" help @@ -8,6 +11,10 @@ config ROCKCHIP_RK3288 video interfaces supporting HDMI and eDP, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs. + select CPU_V7 + select RK_TIMER + select SUPPORT_SPL + select SPL
config ROCKCHIP_RK3036 bool "Support Rockchip RK3036" @@ -16,6 +23,21 @@ config ROCKCHIP_RK3036 including NEON and GPU, Mali-400 graphics, several DDR3 options and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. + select CPU_V7 + select RK_TIMER + select SUPPORT_SPL + select SPL + +config ROCKCHIP_RK3399 + bool "Support Rockchip RK3399" + help + The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 + and qual-core Cortex-A53. + including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two + video interfaces supporting HDMI and eDP, several DDR3 options + and video codec support. Peripherals include Gigabit Ethernet, + USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs. + select ARM64
config SYS_MALLOC_F default y @@ -42,8 +64,9 @@ config DM_GPIO default y
config BLK - default y + default y if CPU_V7
source "arch/arm/mach-rockchip/rk3288/Kconfig" source "arch/arm/mach-rockchip/rk3036/Kconfig" +source "arch/arm/mach-rockchip/rk3399/Kconfig" endif diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 55567cb..50246f0 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -10,6 +10,6 @@ obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o else obj-$(CONFIG_ROCKCHIP_RK3288) += board.o endif -obj-y += rk_timer.o +obj-$(CONFIG_RK_TIMER) += rk_timer.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/ obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/ diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig new file mode 100644 index 0000000..603f534 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -0,0 +1,19 @@ +if ROCKCHIP_RK3399 + +config TARGET_EVB_RK3399 + bool "RK3399 evb board" + help + Firefly is a RK3288-based development board with 2 USB ports, + HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It + also includes on-board eMMC and 1GB of SDRAM. Expansion connectors + provide access to display pins, I2C, SPI, UART and GPIOs. + +config SYS_SOC + default "rockchip" + +config SYS_MALLOC_F_LEN + default 0x0800 + +source "board/rockchip/evb_rk3399/Kconfig" + +endif diff --git a/arch/arm/mach-rockchip/rk3399/Makefile b/arch/arm/mach-rockchip/rk3399/Makefile new file mode 100644 index 0000000..ca69207 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3399/Makefile @@ -0,0 +1,5 @@ +# +# Copyright (C) 2016 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# diff --git a/board/rockchip/evb_rk3399/Kconfig b/board/rockchip/evb_rk3399/Kconfig new file mode 100644 index 0000000..412b81c --- /dev/null +++ b/board/rockchip/evb_rk3399/Kconfig @@ -0,0 +1,15 @@ +if TARGET_EVB_RK3399 + +config SYS_BOARD + default "evb_rk3399" + +config SYS_VENDOR + default "rockchip" + +config SYS_CONFIG_NAME + default "evb_rk3399" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS new file mode 100644 index 0000000..e69de29 diff --git a/board/rockchip/evb_rk3399/Makefile b/board/rockchip/evb_rk3399/Makefile new file mode 100644 index 0000000..aaa51c2 --- /dev/null +++ b/board/rockchip/evb_rk3399/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2016 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += evb-rk3399.o diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c new file mode 100644 index 0000000..357b08b --- /dev/null +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -0,0 +1,41 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <dm.h> +#include <common.h> +#include <asm/armv8/mmu.h> + +DECLARE_GLOBAL_DATA_PTR; + +static struct mm_region rk3399_mem_map[] = { + { + .base = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .base = 0xf0000000UL, + .size = 0x10000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = rk3399_mem_map; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + gd->ram_size = 0x80000000; + return 0; +} diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h new file mode 100644 index 0000000..0bf4f66 --- /dev/null +++ b/include/configs/evb_rk3399.h @@ -0,0 +1,24 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __EVB_RK3399_H +#define __EVB_RK3399_H + +#include <configs/rk3399_common.h> + + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +/* SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) + +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +#endif diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h new file mode 100644 index 0000000..1c13e2e --- /dev/null +++ b/include/configs/rk3399_common.h @@ -0,0 +1,84 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_RK3399_COMMON_H +#define __CONFIG_RK3399_COMMON_H + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#include <asm/arch/hardware.h> + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_BAUDRATE 1500000 +#define CONFIG_SYS_MALLOC_LEN (32 << 20) +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_MEM32 + +#define CONFIG_SYS_TEXT_BASE 0x00200000 +#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 +#define CONFIG_SYS_LOAD_ADDR 0x00800800 + +#define CONFIG_ROCKCHIP_COMMON +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ + +/* MMC/SD IP block */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_SDHCI +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 + +#define CONFIG_DOS_PARTITION +#define CONFIG_FAT_WRITE +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + +/* RAW SD card / eMMC locations. */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 +#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) + +/* FAT sd card locations. */ +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" + +#define CONFIG_SPL_PINCTRL_SUPPORT +#define CONFIG_SPL_RAM_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT + +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_NR_DRAM_BANKS 1 +#define SDRAM_BANK_SIZE (2UL << 30) + +#define CONFIG_SPI_FLASH +#define CONFIG_SPI +#define CONFIG_SF_DEFAULT_SPEED 20000000 + +#ifndef CONFIG_SPL_BUILD +#include <config_distro_defaults.h> + +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00000000\0" \ + "pxefile_addr_r=0x00100000\0" \ + "fdt_addr_r=0x01f00000\0" \ + "kernel_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x04000000\0" + +/* First try to boot from SD (index 0), then eMMC (index 1 */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) + +#include <config_distro_bootcmd.h> +#endif + +#endif