This patch move u-boot properties to -u-boot.dtsi file.
Signed-off-by: Sam Shih sam.shih@mediatek.com Reviewed-by: Ryder Lee ryder.lee@mediatek.com --- arch/arm/dts/mt7623-u-boot.dtsi | 29 +++++++++++++++++++ arch/arm/dts/mt7623.dtsi | 6 ---- arch/arm/dts/mt7623n-bananapi-bpi-r2.dts | 1 + arch/arm/dts/mt7629-rfb-u-boot.dtsi | 36 ++++++++++++++++++++++++ arch/arm/dts/mt7629-rfb.dts | 1 + arch/arm/dts/mt7629.dtsi | 9 ------ 6 files changed, 67 insertions(+), 15 deletions(-) create mode 100644 arch/arm/dts/mt7623-u-boot.dtsi
diff --git a/arch/arm/dts/mt7623-u-boot.dtsi b/arch/arm/dts/mt7623-u-boot.dtsi new file mode 100644 index 0000000000..832c16dca8 --- /dev/null +++ b/arch/arm/dts/mt7623-u-boot.dtsi @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 MediaTek Inc. + * Author: Sam Shih sam.shih@mediatek.com + */ + +&topckgen { + u-boot,dm-pre-reloc; +}; + +&topckgen { + u-boot,dm-pre-reloc; +}; + +&pericfg { + u-boot,dm-pre-reloc; +}; + +&timer0 { + u-boot,dm-pre-reloc; +}; + +&apmixedsys { + u-boot,dm-pre-reloc; +}; + +&uart2 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/mt7623.dtsi b/arch/arm/dts/mt7623.dtsi index 1135b1e1ae..1f45dea575 100644 --- a/arch/arm/dts/mt7623.dtsi +++ b/arch/arm/dts/mt7623.dtsi @@ -101,21 +101,18 @@ compatible = "mediatek,mt7623-topckgen"; reg = <0x10000000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; };
infracfg: syscon@10001000 { compatible = "mediatek,mt7623-infracfg", "syscon"; reg = <0x10001000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; };
pericfg: syscon@10003000 { compatible = "mediatek,mt7623-pericfg", "syscon"; reg = <0x10003000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; };
pinctrl: pinctrl@10005000 { @@ -155,7 +152,6 @@ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>; clocks = <&system_clk>; clock-names = "system-clk"; - u-boot,dm-pre-reloc; };
sysirq: interrupt-controller@10200100 { @@ -170,7 +166,6 @@ compatible = "mediatek,mt7623-apmixedsys"; reg = <0x10209000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; };
gic: interrupt-controller@10211000 { @@ -215,7 +210,6 @@ <&pericfg CLK_PERI_UART2>; clock-names = "baud", "bus"; status = "disabled"; - u-boot,dm-pre-reloc; };
uart3: serial@11005000 { diff --git a/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts index b0c86219b6..bcedcf20f1 100644 --- a/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts +++ b/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts @@ -7,6 +7,7 @@
/dts-v1/; #include "mt7623.dtsi" +#include "mt7623-u-boot.dtsi"
/ { model = "Bananapi BPI-R2"; diff --git a/arch/arm/dts/mt7629-rfb-u-boot.dtsi b/arch/arm/dts/mt7629-rfb-u-boot.dtsi index 1ef5568518..164afd633b 100644 --- a/arch/arm/dts/mt7629-rfb-u-boot.dtsi +++ b/arch/arm/dts/mt7629-rfb-u-boot.dtsi @@ -22,3 +22,39 @@ #endif }; }; + +&infracfg { + u-boot,dm-pre-reloc; +}; + +&pericfg { + u-boot,dm-pre-reloc; +}; + +&timer0 { + u-boot,dm-pre-reloc; +}; + +&mcucfg { + u-boot,dm-pre-reloc; +}; + +&dramc { + u-boot,dm-pre-reloc; +}; + +&apmixedsys { + u-boot,dm-pre-reloc; +}; + +&topckgen { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&snfi { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts index 0981f9b3b1..687fe1c029 100644 --- a/arch/arm/dts/mt7629-rfb.dts +++ b/arch/arm/dts/mt7629-rfb.dts @@ -7,6 +7,7 @@
/dts-v1/; #include "mt7629.dtsi" +#include "mt7629-rfb-u-boot.dtsi"
/ { model = "MediaTek MT7629 RFB"; diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi index b0c843bafd..a33a74a556 100644 --- a/arch/arm/dts/mt7629.dtsi +++ b/arch/arm/dts/mt7629.dtsi @@ -68,14 +68,12 @@ compatible = "mediatek,mt7629-infracfg", "syscon"; reg = <0x10000000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; };
pericfg: syscon@10002000 { compatible = "mediatek,mt7629-pericfg", "syscon"; reg = <0x10002000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; };
timer0: timer@10004000 { @@ -85,7 +83,6 @@ clocks = <&topckgen CLK_TOP_CLKXTAL_D4>, <&topckgen CLK_TOP_10M_SEL>; clock-names = "mux", "src"; - u-boot,dm-pre-reloc; };
scpsys: scpsys@10006000 { @@ -103,7 +100,6 @@ compatible = "mediatek,mt7629-mcucfg", "syscon"; reg = <0x10200000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; };
sysirq: interrupt-controller@10200a80 { @@ -124,21 +120,18 @@ <&topckgen CLK_TOP_MEM_SEL>, <&topckgen CLK_TOP_DMPLL>; clock-names = "phy", "phy_mux", "mem", "mem_mux"; - u-boot,dm-pre-reloc; };
apmixedsys: clock-controller@10209000 { compatible = "mediatek,mt7629-apmixedsys"; reg = <0x10209000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; };
topckgen: clock-controller@10210000 { compatible = "mediatek,mt7629-topckgen"; reg = <0x10210000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; };
watchdog: watchdog@10212000 { @@ -186,7 +179,6 @@ status = "disabled"; assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>; - u-boot,dm-pre-reloc; };
uart1: serial@11003000 { @@ -228,7 +220,6 @@ status = "disabled"; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; };
ethsys: syscon@1b000000 {