On Fri, Aug 4, 2017 at 3:03 PM, Andy Yan andy.yan@rock-chips.com wrote:
Add support for GD25Q256, a 32MiB SPI Nor flash from Gigadevice.
Signed-off-by: Andy Yan andy.yan@rock-chips.com
drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/spi_flash.c | 7 ++++--- drivers/mtd/spi/spi_flash_ids.c | 1 + 3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 839cdbe..357b3bc 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -37,6 +37,7 @@ enum spi_nor_option_flags { #define SPI_FLASH_CFI_MFR_SST 0xbf #define SPI_FLASH_CFI_MFR_WINBOND 0xef #define SPI_FLASH_CFI_MFR_ATMEL 0x1f +#define SPI_FLASH_CIF_MFR_GIGADEVICE 0xc8
/* Erase commands */ #define CMD_ERASE_4K 0x20 diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 0034a28..cf23077 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -74,7 +74,7 @@ static int write_sr(struct spi_flash *flash, u8 ws) return 0; }
-#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) || defined(CONFIG_SPI_FLASH_GIGADEVICE) static int read_cr(struct spi_flash *flash, u8 *rc) { int ret; @@ -807,7 +807,7 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) #endif
-#ifdef CONFIG_SPI_FLASH_MACRONIX +#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_GIGADEVICE)
So GB and Macronix has same procedure bit for Quadenable? in that case why you need read_cr bcz it is part of spansion.
thanks!