This series enables the ADMA present in some OMAP SOCs. On a DRA7 the performances when reading from the eMMC go from 18MB/s to 43MB/s. Also while were at it, fix some incorrect bit operations
This series applies on top of the series that enables HS200 and UHS mode "mmc: Add support for HS200 and UHS modes" but should be easy to use on top of u-boot/master (just remove special handling of the tuning).
This is the first series of 3 which wille enable HS200 and UHS on the omap5 platforms (dra7 and am57).
Cheers,
Jean-Jacques
changes since v1: * added a timeout to terminate the DMA transfer if it takes too long * changed omap_hsmmc_adma_desc() and omap_hsmmc_prepare_adma_table(() to not return any value (void) * removed wrong comment about cache handling
Jean-Jacques Hiblot (2): Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT" omap: Update the base address of the MMC controllers
Kishon Vijay Abraham I (3): mmc: omap_hsmmc: Add support for DMA (ADMA2) mmc: omap_hsmmc: Enable Auto command (CMD12) enable mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit
arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 4 +- arch/arm/include/asm/arch-omap4/mmc_host_def.h | 6 +- arch/arm/include/asm/arch-omap5/mmc_host_def.h | 6 +- arch/arm/include/asm/omap_mmc.h | 19 +- arch/arm/mach-keystone/include/mach/mmc_host_def.h | 4 +- drivers/mmc/omap_hsmmc.c | 251 +++++++++++++++++---- 6 files changed, 238 insertions(+), 52 deletions(-)