From: Fabio Estevam fabio.estevam@nxp.com
Read the number of cores in the fuses to distinguish between the dual and solo versions.
Tested on a mx7d sabresd and on a mx7solo warp7.
Signed-off-by: Fabio Estevam fabio.estevam@nxp.com --- arch/arm/cpu/armv7/mx7/soc.c | 18 ++++++++++++++++++ arch/arm/imx-common/cpu.c | 2 ++ arch/arm/include/asm/arch-imx/cpu.h | 1 + 3 files changed, 21 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c index ba6cfb9..073bbc6 100644 --- a/arch/arm/cpu/armv7/mx7/soc.c +++ b/arch/arm/cpu/armv7/mx7/soc.c @@ -165,6 +165,21 @@ u32 get_cpu_temp_grade(int *minc, int *maxc) return val; }
+static bool is_mx7d(void) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + int val; + + val = readl(&fuse->tester4); + if (val & 1) + return false; + else + return true; +} + u32 get_cpu_rev(void) { struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *) @@ -172,6 +187,9 @@ u32 get_cpu_rev(void) u32 reg = readl(&ccm_anatop->digprog); u32 type = (reg >> 16) & 0xff;
+ if (!is_mx7d()) + type = MXC_CPU_MX7S; + reg &= 0xff; return (type << 12) | reg; } diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 656bb60..5fb3ed8 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -137,6 +137,8 @@ unsigned imx_ddr_size(void) const char *get_imx_type(u32 imxtype) { switch (imxtype) { + case MXC_CPU_MX7S: + return "7SOLO"; /* Single-core version of the mx7 */ case MXC_CPU_MX7D: return "7D"; /* Dual-core version of the mx7 */ case MXC_CPU_MX6QP: diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index 8a75902..7c63c13 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -21,6 +21,7 @@ #define MXC_CPU_MX6D 0x67 #define MXC_CPU_MX6DP 0x68 #define MXC_CPU_MX6QP 0x69 +#define MXC_CPU_MX7S 0x71 /* dummy ID */ #define MXC_CPU_MX7D 0x72 #define MXC_CPU_VF610 0xF6 /* dummy ID */