This prevents the scenario where data cache is on and the device uses DMA to deploy data. In that case, it might not be possible to flush/invalidate data to RAM properly. The other option is to use bounce buffer, but that involves a lot of copying and therefore degrades performance rapidly. Therefore disallow this possibility of unaligned load address altogether if data cache is on.
Signed-off-by: Marek Vasut marex@denx.de Cc: Wolfgang Denk wd@denx.de --- common/cmd_fat.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/common/cmd_fat.c b/common/cmd_fat.c index 559a16d..951e712 100644 --- a/common/cmd_fat.c +++ b/common/cmd_fat.c @@ -68,7 +68,11 @@ int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) argv[1], dev, part); return 1; } + offset = simple_strtoul(argv[3], NULL, 16); + if (!cacheline_aligned(offset)) + return 1; + if (argc == 6) count = simple_strtoul(argv[5], NULL, 16); else