This board has not been converted to CONFIG_DM by the deadline of v2020.01 and is missing other conversions which depend on this as well. Remove it.
Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Signed-off-by: Tom Rini trini@konsulko.com --- arch/sh/Kconfig | 5 - board/renesas/sh7763rdp/Kconfig | 12 -- board/renesas/sh7763rdp/MAINTAINERS | 7 - board/renesas/sh7763rdp/Makefile | 10 - board/renesas/sh7763rdp/lowlevel_init.S | 259 ------------------------ board/renesas/sh7763rdp/sh7763rdp.c | 54 ----- configs/sh7763rdp_defconfig | 42 ---- include/configs/sh7763rdp.h | 66 ------ 8 files changed, 455 deletions(-) delete mode 100644 board/renesas/sh7763rdp/Kconfig delete mode 100644 board/renesas/sh7763rdp/MAINTAINERS delete mode 100644 board/renesas/sh7763rdp/Makefile delete mode 100644 board/renesas/sh7763rdp/lowlevel_init.S delete mode 100644 board/renesas/sh7763rdp/sh7763rdp.c delete mode 100644 configs/sh7763rdp_defconfig delete mode 100644 include/configs/sh7763rdp.h
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 2e9ccf7632a6..7836869c55dc 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -12,10 +12,6 @@ config TARGET_R2DPLUS bool "Renesas R2D-PLUS" select CPU_SH4
-config TARGET_SH7763RDP - bool "SH7763RDP" - select CPU_SH4 - endchoice
config SYS_ARCH @@ -27,6 +23,5 @@ config SYS_CPU source "arch/sh/lib/Kconfig"
source "board/renesas/r2dplus/Kconfig" -source "board/renesas/sh7763rdp/Kconfig"
endmenu diff --git a/board/renesas/sh7763rdp/Kconfig b/board/renesas/sh7763rdp/Kconfig deleted file mode 100644 index 101d2b5a32e4..000000000000 --- a/board/renesas/sh7763rdp/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_SH7763RDP - -config SYS_BOARD - default "sh7763rdp" - -config SYS_VENDOR - default "renesas" - -config SYS_CONFIG_NAME - default "sh7763rdp" - -endif diff --git a/board/renesas/sh7763rdp/MAINTAINERS b/board/renesas/sh7763rdp/MAINTAINERS deleted file mode 100644 index 6ee8f9f87bc8..000000000000 --- a/board/renesas/sh7763rdp/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -SH7763RDP BOARD -M: Nobuhiro Iwamatsu iwamatsu.nobuhiro@renesas.com -M: Nobuhiro Iwamatsu iwamatsu@nigauri.org -S: Maintained -F: board/renesas/sh7763rdp/ -F: include/configs/sh7763rdp.h -F: configs/sh7763rdp_defconfig diff --git a/board/renesas/sh7763rdp/Makefile b/board/renesas/sh7763rdp/Makefile deleted file mode 100644 index 0db63c5d2bb8..000000000000 --- a/board/renesas/sh7763rdp/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2008 Renesas Solutions Corp. -# Copyright (C) 2008 Nobuhiro Iwamatsu iwamatsu.nobuhiro@renesas.com -# Copyright (C) 2007 Kenati Technologies, Inc. -# -# board/sh7763rdp/Makefile - -obj-y := sh7763rdp.o -extra-y += lowlevel_init.o diff --git a/board/renesas/sh7763rdp/lowlevel_init.S b/board/renesas/sh7763rdp/lowlevel_init.S deleted file mode 100644 index 80ef2580515e..000000000000 --- a/board/renesas/sh7763rdp/lowlevel_init.S +++ /dev/null @@ -1,259 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (C) 2008 Nobuhiro Iwamatsu iwamatsu.nobuhiro@renesas.com - * Copyright (C) 2007 Kenati Technologies, Inc. - * - * board/sh7763rdp/lowlevel_init.S - */ - -#include <config.h> - -#include <asm/processor.h> -#include <asm/macro.h> - - .global lowlevel_init - - .text - .align 2 - -lowlevel_init: - - write32 WDTCSR_A, WDTCSR_D /* Watchdog Control / Status Register */ - - write32 WDTST_A, WDTST_D /* Watchdog Stop Time Register */ - - write32 WDTBST_A, WDTBST_D /* - * 0xFFCC0008 - * Watchdog Base Stop Time Register - */ - - write32 CCR_A, CCR_CACHE_ICI_D /* Address of Cache Control Register */ - /* Instruction Cache Invalidate */ - - write32 MMUCR_A, MMU_CONTROL_TI_D /* MMU Control Register */ - /* TI == TLB Invalidate bit */ - - write32 MSTPCR0_A, MSTPCR0_D /* Address of Power Control Register 0 */ - - write32 MSTPCR1_A, MSTPCR1_D /* Address of Power Control Register 1 */ - - write32 RAMCR_A, RAMCR_D - - mov.l MMSELR_A, r1 - mov.l MMSELR_D, r0 - synco - mov.l r0, @r1 - - mov.l @r1, r2 /* execute two reads after setting MMSELR */ - mov.l @r1, r2 - synco - - /* issue memory read */ - mov.l DDRSD_START_A, r1 /* memory address to read*/ - mov.l @r1, r0 - synco - - write32 MIM8_A, MIM8_D - - write32 MIMC_A, MIMC_D1 - - write32 STRC_A, STRC_D - - write32 SDR4_A, SDR4_D - - write32 MIMC_A, MIMC_D2 - - nop - nop - nop - - write32 SCR4_A, SCR4_D3 - - write32 SCR4_A, SCR4_D2 - - write32 SDMR02000_A, SDMR02000_D - - write32 SDMR00B08_A, SDMR00B08_D - - write32 SCR4_A, SCR4_D2 - - write32 SCR4_A, SCR4_D4 - - nop - nop - nop - nop - - write32 SCR4_A, SCR4_D4 - - nop - nop - nop - nop - - write32 SDMR00308_A, SDMR00308_D - - write32 MIMC_A, MIMC_D3 - - mov.l SCR4_A, r1 - mov.l SCR4_D1, r0 - mov.l DELAY60_D, r3 - -delay_loop_60: - mov.l r0, @r1 - dt r3 - bf delay_loop_60 - nop - - write32 CCR_A, CCR_CACHE_D_2 /* Address of Cache Control Register */ - -bsc_init: - write32 BCR_A, BCR_D - - write32 CS0BCR_A, CS0BCR_D - - write32 CS1BCR_A, CS1BCR_D - - write32 CS2BCR_A, CS2BCR_D - - write32 CS4BCR_A, CS4BCR_D - - write32 CS5BCR_A, CS5BCR_D - - write32 CS6BCR_A, CS6BCR_D - - write32 CS0WCR_A, CS0WCR_D - - write32 CS1WCR_A, CS1WCR_D - - write32 CS2WCR_A, CS2WCR_D - - write32 CS4WCR_A, CS4WCR_D - - write32 CS5WCR_A, CS5WCR_D - - write32 CS6WCR_A, CS6WCR_D - - write32 CS5PCR_A, CS5PCR_D - - write32 CS6PCR_A, CS6PCR_D - - mov.l DELAY200_D, r3 - -delay_loop_200: - dt r3 - bf delay_loop_200 - nop - - write16 PSEL0_A, PSEL0_D - - write16 PSEL1_A, PSEL1_D - - write32 ICR0_A, ICR0_D - - stc sr, r0 /* BL bit off(init=ON) */ - mov.l SR_MASK_D, r1 - and r1, r0 - ldc r0, sr - - rts - nop - - .align 2 - -DELAY60_D: .long 60 -DELAY200_D: .long 17800 - -CCR_A: .long 0xFF00001C -MMUCR_A: .long 0xFF000010 -RAMCR_A: .long 0xFF000074 - -/* Low power mode control */ -MSTPCR0_A: .long 0xFFC80030 -MSTPCR1_A: .long 0xFFC80038 - -/* RWBT */ -WDTST_A: .long 0xFFCC0000 -WDTCSR_A: .long 0xFFCC0004 -WDTBST_A: .long 0xFFCC0008 - -/* BSC */ -MMSELR_A: .long 0xFE600020 -BCR_A: .long 0xFF801000 -CS0BCR_A: .long 0xFF802000 -CS1BCR_A: .long 0xFF802010 -CS2BCR_A: .long 0xFF802020 -CS4BCR_A: .long 0xFF802040 -CS5BCR_A: .long 0xFF802050 -CS6BCR_A: .long 0xFF802060 -CS0WCR_A: .long 0xFF802008 -CS1WCR_A: .long 0xFF802018 -CS2WCR_A: .long 0xFF802028 -CS4WCR_A: .long 0xFF802048 -CS5WCR_A: .long 0xFF802058 -CS6WCR_A: .long 0xFF802068 -CS5PCR_A: .long 0xFF802070 -CS6PCR_A: .long 0xFF802080 -DDRSD_START_A: .long 0xAC000000 - -/* INTC */ -ICR0_A: .long 0xFFD00000 - -/* DDR I/F */ -MIM8_A: .long 0xFE800008 -MIMC_A: .long 0xFE80000C -SCR4_A: .long 0xFE800014 -STRC_A: .long 0xFE80001C -SDR4_A: .long 0xFE800034 -SDMR00308_A: .long 0xFE900308 -SDMR00B08_A: .long 0xFE900B08 -SDMR02000_A: .long 0xFE902000 - -/* GPIO */ -PSEL0_A: .long 0xFFEF0070 -PSEL1_A: .long 0xFFEF0072 - -CCR_CACHE_ICI_D:.long 0x00000800 -CCR_CACHE_D_2: .long 0x00000103 -MMU_CONTROL_TI_D:.long 0x00000004 -RAMCR_D: .long 0x00000200 -MSTPCR0_D: .long 0x00000000 -MSTPCR1_D: .long 0x00000000 - -MMSELR_D: .long 0xa5a50000 -BCR_D: .long 0x00000000 -CS0BCR_D: .long 0x77777770 -CS1BCR_D: .long 0x77777670 -CS2BCR_D: .long 0x77777670 -CS4BCR_D: .long 0x77777670 -CS5BCR_D: .long 0x77777670 -CS6BCR_D: .long 0x77777670 -CS0WCR_D: .long 0x7777770F -CS1WCR_D: .long 0x22000002 -CS2WCR_D: .long 0x7777770F -CS4WCR_D: .long 0x7777770F -CS5WCR_D: .long 0x7777770F -CS6WCR_D: .long 0x7777770F -CS5PCR_D: .long 0x77000000 -CS6PCR_D: .long 0x77000000 -ICR0_D: .long 0x00E00000 -MIM8_D: .long 0x00000000 -MIMC_D1: .long 0x01d10008 -MIMC_D2: .long 0x01d10009 -MIMC_D3: .long 0x01d10209 -SCR4_D1: .long 0x00000001 -SCR4_D2: .long 0x00000002 -SCR4_D3: .long 0x00000003 -SCR4_D4: .long 0x00000004 -STRC_D: .long 0x000f3980 -SDR4_D: .long 0x00000300 -SDMR00308_D: .long 0x00000000 -SDMR00B08_D: .long 0x00000000 -SDMR02000_D: .long 0x00000000 -PSEL0_D: .word 0x00000001 -PSEL1_D: .word 0x00000244 -SR_MASK_D: .long 0xEFFFFF0F -WDTST_D: .long 0x5A000FFF -WDTCSR_D: .long 0xA5000000 -WDTBST_D: .long 0x55000000 diff --git a/board/renesas/sh7763rdp/sh7763rdp.c b/board/renesas/sh7763rdp/sh7763rdp.c deleted file mode 100644 index 73a53c1e5acf..000000000000 --- a/board/renesas/sh7763rdp/sh7763rdp.c +++ /dev/null @@ -1,54 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (C) 2008 Nobuhiro Iwamatsu iwamatsu.nobuhiro@renesas.com - * Copyright (C) 2007 Kenati Technologies, Inc. - * - * board/sh7763rdp/sh7763rdp.c - */ - -#include <common.h> -#include <init.h> -#include <asm/io.h> -#include <asm/processor.h> - -#define CPU_CMDREG 0xB1000006 -#define PDCR 0xffef0006 -#define PECR 0xffef0008 -#define PFCR 0xffef000a -#define PGCR 0xffef000c -#define PHCR 0xffef000e -#define PJCR 0xffef0012 -#define PKCR 0xffef0014 -#define PLCR 0xffef0016 -#define PMCR 0xffef0018 -#define PSEL1 0xffef0072 -#define PSEL2 0xffef0074 -#define PSEL3 0xffef0076 - -int checkboard(void) -{ - puts("BOARD: Renesas SH7763 RDP\n"); - return 0; -} - -int board_init(void) -{ - vu_short dat; - - /* Enable mode */ - writew(inw(CPU_CMDREG)|0x0001, CPU_CMDREG); - - /* GPIO Setting (eth1) */ - dat = inw(PSEL1); - writew(((dat & ~0xff00) | 0x2400), PSEL1); - writew(0, PFCR); - writew(0, PGCR); - writew(0, PHCR); - - return 0; -} - -void led_set_state(unsigned short value) -{ -} diff --git a/configs/sh7763rdp_defconfig b/configs/sh7763rdp_defconfig deleted file mode 100644 index 072202efe88b..000000000000 --- a/configs/sh7763rdp_defconfig +++ /dev/null @@ -1,42 +0,0 @@ -CONFIG_SH=y -CONFIG_SYS_TEXT_BASE=0x8FFC0000 -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_SH7763RDP=y -CONFIG_BOOTDELAY=-1 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC2,115200 root=1f01" -# CONFIG_CMDLINE_EDITING is not set -# CONFIG_AUTO_COMPLETE is not set -# CONFIG_CMD_BDI is not set -# CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_RUN is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_EDITENV is not set -# CONFIG_CMD_ENV_EXISTS is not set -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_SDRAM=y -# CONFIG_CMD_ECHO is not set -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SOURCE is not set -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -# CONFIG_CMD_SLEEP is not set -CONFIG_CMD_JFFS2=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_ADDR=0xA0020000 -CONFIG_ENV_ADDR_REDUND=0xA0040000 -CONFIG_VERSION_VARIABLE=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_BITBANGMII=y -CONFIG_SH_ETHER=y -CONFIG_SCIF_CONSOLE=y -CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h deleted file mode 100644 index 5e27f3b8f155..000000000000 --- a/include/configs/sh7763rdp.h +++ /dev/null @@ -1,66 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuation settings for the Renesas SH7763RDP board - * - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (C) 2008 Nobuhiro Iwamatsu iwamatsu.nobuhiro@renesas.com - */ - -#ifndef __SH7763RDP_H -#define __SH7763RDP_H - -#define CONFIG_CPU_SH7763 1 -#define __LITTLE_ENDIAN 1 - -#define CONFIG_DISPLAY_BOARDINFO - -/* SCIF */ -#define CONFIG_CONS_SCIF2 1 - -#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ -#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate - settings for this board */ - -/* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE (0x8C000000) -#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) - -/* Flash(NOR) */ -#define CONFIG_SYS_FLASH_BASE (0xA0000000) -#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) -#define CONFIG_SYS_MAX_FLASH_BANKS (1) -#define CONFIG_SYS_MAX_FLASH_SECT (520) - -/* U-Boot setting */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_MONITOR_LEN (128 * 1024) -/* Size of DRAM reserved for malloc() use */ -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) -#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) - -#undef CONFIG_SYS_FLASH_QUIET_TEST -#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -/* Timeout for Flash erase operations (in ms) */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) -/* Timeout for Flash write operations (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) -/* Timeout for Flash set sector lock bit operations (in ms) */ -#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) -/* Timeout for Flash clear lock bit operations (in ms) */ -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) -/* Use hardware flash sectors protection instead of U-Boot software protection */ -#undef CONFIG_SYS_DIRECT_FLASH_TFTP -/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ - -/* Clock */ -#define CONFIG_SYS_CLK_FREQ 66666666 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ - -/* Ether */ -#define CONFIG_SH_ETHER_USE_PORT (1) -#define CONFIG_SH_ETHER_PHY_ADDR (0x01) -#define CONFIG_BITBANGMII_MULTI -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII - -#endif /* __SH7763RDP_H */