From: Benjamin Szőke egyszeregy@freemail.hu
Take over codes from Techenxion to support SoMs with 2GB DDR3.
Signed-off-by: Benjamin Szőke egyszeregy@freemail.hu --- board/technexion/pico-imx7d/Makefile | 2 +- .../pico-imx7d/{spl.c => pico-imx7d_spl.c} | 30 +++++++++++++++++-- 2 files changed, 28 insertions(+), 4 deletions(-) rename board/technexion/pico-imx7d/{spl.c => pico-imx7d_spl.c} (83%)
diff --git a/board/technexion/pico-imx7d/Makefile b/board/technexion/pico-imx7d/Makefile index 4ae3d606b5..b45b127884 100644 --- a/board/technexion/pico-imx7d/Makefile +++ b/board/technexion/pico-imx7d/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0+ # (C) Copyright 2017 NXP Semiconductors
-obj-y := pico-imx7d.o spl.o +obj-y := pico-imx7d.o pico-imx7d_spl.o diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/pico-imx7d_spl.c similarity index 83% rename from board/technexion/pico-imx7d/spl.c rename to board/technexion/pico-imx7d/pico-imx7d_spl.c index df5f058577..0009c55022 100644 --- a/board/technexion/pico-imx7d/spl.c +++ b/board/technexion/pico-imx7d/pico-imx7d_spl.c @@ -61,6 +61,8 @@ static struct ddrc ddrc_regs_val = { .dramtmg0 = 0x09081109, .addrmap0 = 0x0000001f, .addrmap1 = 0x00080808, + .addrmap2 = 0x00000000, + .addrmap3 = 0x00000000, .addrmap4 = 0x00000f0f, .addrmap5 = 0x07070707, .addrmap6 = 0x0f0f0707, @@ -100,17 +102,39 @@ static void gpr_init(void) writel(0x4F400005, &gpr_regs->gpr[1]); }
+/********************************************** +* Revision Detection +* +* DDR_TYPE_DET_1 DDR_TYPE_DET_2 +* GPIO_1 GPIO_2 +* 0 1 2GB DDR3 +* 0 0 1GB DDR3 +* 1 0 512MB DDR3 +***********************************************/ static bool is_1g(void) { gpio_direction_input(IMX_GPIO_NR(1, 12)); return !gpio_get_value(IMX_GPIO_NR(1, 12)); }
-static void ddr_init(void) +static bool is_2g(void) { - if (is_1g()) - ddrc_regs_val.addrmap6 = 0x0f070707; + gpio_direction_input(IMX_GPIO_NR(1, 13)); + return gpio_get_value(IMX_GPIO_NR(1, 13)); +}
+static void ddr_init(void) +{ + if (is_1g()) { + if (is_2g()) { + ddrc_regs_val.addrmap0 = 0x0000001f; + ddrc_regs_val.addrmap1 = 0x00181818; + ddrc_regs_val.addrmap4 = 0x00000f0f; + ddrc_regs_val.addrmap5 = 0x04040404; + ddrc_regs_val.addrmap6 = 0x04040404; + } else + ddrc_regs_val.addrmap6 = 0x0f070707; + } mx7_dram_cfg(&ddrc_regs_val, &ddrc_mp_val, &ddr_phy_regs_val, &calib_param); }