4 Apr
2013
4 Apr
'13
1:28 a.m.
On 04/03/2013 05:17 PM, Tom Warren wrote:
A comparison of registers between our internal NV U-Boot and u-boot-tegra/next showed some discrepancies in the MSELECT clock divisor programming. T20 doesn't have a MSELECT clk src reg.
I'm not familiar with this code/HW, but it seems OK at a quick glance, so, Reviewed-by: Stephen Warren swarren@nvidia.com