Re: [U-Boot] [PATCH] iMX6: Disable the L2 before chaning the PL310 latency

9 Sep 2014


      On 20/08/2014 11:18, Ye.Li wrote:
...
From: "Ye.Li" Ye.Li@freescale.com
The Latency parameters of PL310 Tag RAM latency control register and
Data RAM Latency control register are set in L2 cache enable. And
setting these registers must have PL310 NOT enabled.
But when using Plugin mode boot, the PL310 is enabled by bootrom.
The patch disables the PL310 before applying this setting.
Signed-off-by: Ye.Li Ye.Li@freescale.com
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
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