Hi,<br><br>I am working on Nios2 custom board with intel CFI j3 flash and my data bus is only 16 bit wide. The cfi driver I have modified with asm/io calls in order to by pass the cache. But now cp.w is working and not the cp.b and cp.l . What could be the possible reason as the saveenv (writebuf) is also working fine.<br>
<br>Thanks &amp; Regards,<br>Shinose.<br>