
11 Aug
2014
11 Aug
'14
5:33 p.m.
Hi,
On Fri, 28 Feb 2014 15:12:25 +0800 Liu Ying Ying.Liu@freescale.com wrote:
Instead of waiting for DC triple buffer to be cleared, this patch changes to wait for a relevant DP sync flow end interrupt to come when disabling sync BG flows. In this way, we align the implement to the freescale internal IPUv3 driver. After applying this patch, an uboot hang up issue at the arch_preboot_os() stage, where we disable a relevant ipu display channel, is not observed any more on some MX6DL platforms.
Signed-off-by: Liu Ying Ying.Liu@freescale.com
drivers/video/ipu.h | 8 ++++++++ drivers/video/ipu_disp.c | 27 ++++++++------------------- drivers/video/ipu_regs.h | 3 +++ 3 files changed, 19 insertions(+), 19 deletions(-)
applied to u-boot-video/master. Thanks!
Anatolij