On Thu, Mar 23, 2017 at 3:39 PM, Marek Vasut marex@denx.de wrote:
On 03/23/2017 06:36 AM, Ley Foon Tan wrote:
On Wed, Mar 22, 2017 at 10:26 PM, Marek Vasut marex@denx.de wrote:
On 03/22/2017 10:45 AM, Ley Foon Tan wrote:
On Fri, Mar 10, 2017 at 9:53 AM, Marek Vasut marex@denx.de wrote:
On 03/09/2017 01:26 AM, Ley Foon Tan wrote:
Convert Altera ddr driver to use Kconfig method. Enable ALTERA_SDRAM by default if it is on Gen5 target. Arria 10 will have different driver.
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
drivers/Kconfig | 2 ++ drivers/ddr/Kconfig | 1 + drivers/ddr/altera/Kconfig | 6 ++++++ include/configs/socfpga_common.h | 5 ----- 4 files changed, 9 insertions(+), 5 deletions(-) create mode 100644 drivers/ddr/Kconfig create mode 100644 drivers/ddr/altera/Kconfig
diff --git a/drivers/Kconfig b/drivers/Kconfig index 0e5d97d..3e6bbac 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -14,6 +14,8 @@ source "drivers/cpu/Kconfig"
source "drivers/crypto/Kconfig"
+source "drivers/ddr/Kconfig"
source "drivers/demo/Kconfig"
source "drivers/ddr/fsl/Kconfig" diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig new file mode 100644 index 0000000..b764add --- /dev/null +++ b/drivers/ddr/Kconfig @@ -0,0 +1 @@ +source "drivers/ddr/altera/Kconfig" diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig new file mode 100644 index 0000000..9554da7 --- /dev/null +++ b/drivers/ddr/altera/Kconfig @@ -0,0 +1,6 @@ +config ALTERA_SDRAM
bool "SoCFPGA SDRAM for Arria5/Cyclone5 devices"Does this controller even support SDRAM ? :)
The existing DDR driver is for Gen5 only. We will have new DDR driver for Arria 10 in later patchset.
I was asking about the SDRAM support in Gen5 controller though :)
Yes, it support for double data rate 2 (DDR2), DDR3, and low-power DDR2 (LPDDR2) SDRAM.
Ah, so a misnomer . I'd prefer to have something like "SoCFPGA DRAM controller ... or SoCFPGA DDR SDRAM controller" in the Kconfig option to make it clear.
Okay, will change it to "SoCFPGA DDR SDRAM controller".
Thanks.
Regards Ley Foon