add support for MII ports that lack a PHY with standard PHY registers
Signed-off-by: Michael Schwingen michael@schwingen.org --- arch/arm/cpu/ixp/npe/npe.c | 18 +++++++++++++++++- include/configs/actux2.h | 5 +++++ include/configs/actux3.h | 5 +++++ 3 files changed, 27 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/ixp/npe/npe.c b/arch/arm/cpu/ixp/npe/npe.c index 9d1090e..87f4600 100644 --- a/arch/arm/cpu/ixp/npe/npe.c +++ b/arch/arm/cpu/ixp/npe/npe.c @@ -359,6 +359,21 @@ static int npe_init(struct eth_device *dev, bd_t * bis)
debug("%s: 1\n", __FUNCTION__);
+#ifdef CONFIG_MII_NPE0_FIXEDLINK + if (0 == p_npe->eth_id) { + speed = CONFIG_MII_NPE0_SPEED; + duplex = CONFIG_MII_NPE0_FULLDUPLEX ? FULL : HALF; + } + else +#endif +#ifdef CONFIG_MII_NPE1_FIXEDLINK + if (1 == p_npe->eth_id) { + speed = CONFIG_MII_NPE1_SPEED; + duplex = CONFIG_MII_NPE1_FULLDUPLEX ? FULL : HALF; + } + else +#endif + { miiphy_read (dev->name, p_npe->phy_no, PHY_BMSR, ®_short);
/* @@ -388,7 +403,8 @@ static int npe_init(struct eth_device *dev, bd_t * bis)
speed = miiphy_speed (dev->name, p_npe->phy_no); duplex = miiphy_duplex (dev->name, p_npe->phy_no); - + } + if (p_npe->print_speed) { p_npe->print_speed = 0; printf ("ENET Speed is %d Mbps - %s duplex connection\n", diff --git a/include/configs/actux2.h b/include/configs/actux2.h index 4ba3ce0..fc0af32 100644 --- a/include/configs/actux2.h +++ b/include/configs/actux2.h @@ -152,6 +152,11 @@ #define CONFIG_PHY_ADDR 0x00 /* MII PHY management */ #define CONFIG_MII 1 +/* fixed-speed switch without standard PHY registers on MII */ +#define CONFIG_MII_NPE0_FIXEDLINK 1 +#define CONFIG_MII_NPE0_SPEED 100 +#define CONFIG_MII_NPE0_FULLDUPLEX 1 + /* Number of ethernet rx buffers & descriptors */ #define CONFIG_SYS_RX_ETH_BUFFER 16 #define CONFIG_RESET_PHY_R 1 diff --git a/include/configs/actux3.h b/include/configs/actux3.h index 4b9b496..01b5d12 100644 --- a/include/configs/actux3.h +++ b/include/configs/actux3.h @@ -152,6 +152,11 @@ #define CONFIG_PHY_ADDR 0x10 /* MII PHY management */ #define CONFIG_MII 1 +/* fixed-speed switch without standard PHY registers on MII */ +#define CONFIG_MII_NPE0_FIXEDLINK 1 +#define CONFIG_MII_NPE0_SPEED 100 +#define CONFIG_MII_NPE0_FULLDUPLEX 1 + /* Number of ethernet rx buffers & descriptors */ #define CONFIG_SYS_RX_ETH_BUFFER 16 #define CONFIG_RESET_PHY_R 1