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On 10/30/12 15:47, Ilya Yanok wrote:
TI AM33XX has the same GPMC controller as OMAP3 so we could just use the existing omap_gpmc driver. This patch adds adds required definitions/intialization.
[snip]
--- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c
[snip]
+U_BOOT_CMD( + nandecc, 2, 1, do_switch_ecc, + "switch OMAP3 NAND ECC calculation algorithm", + "[bch8/hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm" +);
While useful for testing, I don't want to add this command to am33xx since we don't need it like we do on omap3. We can be consistent and be whole chip BCH8, or later BCH16 (and use the same logic ROM does and Linux does or will).
[snip]
+++ b/arch/arm/cpu/armv7/am33xx/mem.c +#if defined(CONFIG_CMD_NAND) || defined(CONFIG_CMD_ONENAND)
There will be no ONENAND. ANd please fixup comment style issues that we're copying from omap3.
[snip]
+++ b/arch/arm/include/asm/arch-am33xx/mem.h +#ifndef __ASSEMBLY__ +enum { + STACKED = 0, + IP_DDR = 1, + COMBO_DDR = 2, + IP_SDR = 3, +}; +#endif /* __ASSEMBLY__ */ + +#define EARLY_INIT 1 +
We don't need that enum I think. We shouldn't need EARLY_INIT either.
+/* + * GPMC settings - + * Definitions is as per the following format + * #define <PART>_GPMC_CONFIG<x> <value> + * Where: + * PART is the part name e.g. STNOR - Intel Strata Flash + * x is GPMC config registers from 1 to 6 (there will be 6 macros) + * Value is corresponding value + * + * For every valid PRCM configuration there should be only one definition of + * the same. if values are independent of the board, this definition will be + * present in this file if values are dependent on the board, then this should +
- go into corresponding mem-boardName.h file + * + * Currently
valid part Names are (PART): + * STNOR - Intel Strata Flash + * SMNAND - Samsung NAND + * MPDB - H4 MPDB board + * SBNOR - Sibley NOR + * MNAND - Micron Large page x16 NAND + * ONNAND - Samsung One NAND + * + * include/configs/file.h contains the defn - for all CS we are interested + * #define OMAP34XX_GPMC_CSx PART + * #define OMAP34XX_GPMC_CSx_SIZE Size + * #define OMAP34XX_GPMC_CSx_MAP Map +
- Where: + * x - CS number + * PART - Part Name as defined above +
- SIZE - how big is the mapping to be + * GPMC_SIZE_128M - 0x8 +
- GPMC_SIZE_64M - 0xC + * GPMC_SIZE_32M - 0xE + *
GPMC_SIZE_16M - 0xF + * MAP - Map this CS to which address(GPMC address space)- Absolute address + * >>24 before being used. + */
Lets correct this comment and drop out the GPMC values for chips other than what we have available on the GP EVM. We can add in more later as needed.
[snip]
+/* GPMC CS configuration for an SMSC LAN9221 ethernet controller */ +#define NET_LAN9221_GPMC_CONFIG1 0x00001000 +#define NET_LAN9221_GPMC_CONFIG2 0x00060700 +#define NET_LAN9221_GPMC_CONFIG3 0x00020201 +#define NET_LAN9221_GPMC_CONFIG4 0x06000700 +#define NET_LAN9221_GPMC_CONFIG5 0x0006090A +#define NET_LAN9221_GPMC_CONFIG6 0x87030000 +#define NET_LAN9221_GPMC_CONFIG7 0x00000f6c + +#endif /* __ASM_ARCH_OMAP_GPMC_H */
Also don't need those, right?
- -- Tom