
Vivek Mahajan <vivek.mahajan <at> freescale.com> writes:
- Supported in fsl_pci_init_port() after adding pcie_ep as a param
- Mods in 85xx based board specific pci init after this change
Signed-off-by: Vivek Mahajan <vivek.mahajan <at> freescale.com>
board/freescale/mpc8572ds/mpc8572ds.c | 6 +++--- drivers/pci/fsl_pci_init.c | 18 ++++++++++++++++--
+++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -199,7 +199,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
&pcie3_hose, first_free_busno, pcie_ep);
Why pass this new parameter when the common code already determines it from the PI field?
...
+++ b/drivers/pci/fsl_pci_init.c
int fsl_pci_init_port(struct fsl_pci_info *pci_info,
struct pci_controller *hose, int busno)
struct pci_controller *hose, int busno, int pcie_ep)
- if (pcie_ep) {
pit_t *pi = &pci->pit[2];
pci_setup_indirect(hose, (u32) &pci->cfg_addr,
out_be32(&pi->pitar, 0);
out_be32(&pi->piwbar, 0);
out_be32(&pi->piwar, PIWAR_EN | PIWAR_LOCAL |
PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP | PIWAR_IWS_4K);
Why is this the right size for every board that calls this function?
fsl_pci_config_unlock(hose);
return 0;
This is wrong. It must return the first free busno.
But it shouldn't return here, because some of the initialization in fsl_pci_init() is still needed for an end-point.
And a busno needs to be allocated to an end-point for config transactions.
-EdS