On 12/10/2022 3:35 AM, Marek Vasut wrote:
The PCA9450 reset configuration can now be performed by the PCA9450 PMIC driver itself, remove the hard-coded variant from board code and let the PMIC driver perform this task using one-liner:
$ sed -i '/set WDOG_B_CFG to cold reset/,+2 d' $(git grep -l PCA9450_RESET_CTRL.*0xA1 board/)Venice and i.MX93 EVK required slight manual fix up.
Signed-off-by: Marek Vasut marex@denx.de
Cc: "NXP i.MX U-Boot Team" uboot-imx@nxp.com Cc: "Ying-Chun Liu (PaulLiu)" paul.liu@linaro.org Cc: Fabio Estevam festevam@denx.de Cc: Fabio Estevam festevam@gmail.com Cc: Frieder Schrempf frieder.schrempf@kontron.de Cc: Manoj Sai abbaraju.manojsai@amarulasolutions.com Cc: Marcel Ziswiler marcel.ziswiler@toradex.com Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com
board/advantech/imx8mp_rsb3720a1/spl.c | 3 --- board/dhelectronics/dh_imx8mp/spl.c | 3 --- board/engicam/imx8mp/spl.c | 3 --- board/freescale/imx8mm_evk/spl.c | 3 --- board/freescale/imx8mn_evk/spl.c | 3 --- board/freescale/imx8mp_evk/spl.c | 3 --- board/freescale/imx93_evk/spl.c | 3 --- board/gateworks/venice/spl.c | 3 --- board/kontron/sl-mx8mm/spl.c | 3 --- board/toradex/verdin-imx8mm/spl.c | 3 --- board/toradex/verdin-imx8mp/spl.c | 3 --- 11 files changed, 33 deletions(-)
diff --git a/board/advantech/imx8mp_rsb3720a1/spl.c b/board/advantech/imx8mp_rsb3720a1/spl.c index 6cc8c23ecf8..f4257bc993d 100644 --- a/board/advantech/imx8mp_rsb3720a1/spl.c +++ b/board/advantech/imx8mp_rsb3720a1/spl.c @@ -209,9 +209,6 @@ int power_init_board(void) /* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage 0.95v */ pmic_reg_write(pdev, PCA9450_BUCK2OUT_DVS0, 0x1C);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(pdev, PCA9450_RESET_CTRL, 0xA1);
- /* Forced enable the I2C level translator*/ pmic_reg_write(pdev, PCA9450_CONFIG2, 0x03);
diff --git a/board/dhelectronics/dh_imx8mp/spl.c b/board/dhelectronics/dh_imx8mp/spl.c index 60450bfe369..e2aa874723a 100644 --- a/board/dhelectronics/dh_imx8mp/spl.c +++ b/board/dhelectronics/dh_imx8mp/spl.c @@ -88,9 +88,6 @@ static int dh_imx8mp_board_power_init(void) /* To avoid timing risk from SoC to ARM, increase VDD_ARM to OD voltage 0.95V */ pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1c);
- /* Set WDOG_B_CFG to cold reset. */
- pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
- /* Set LDO4 and CONFIG2 to enable the I2C level translator. */ pmic_reg_write(dev, PCA9450_LDO4CTRL, 0x59); pmic_reg_write(dev, PCA9450_CONFIG2, 0x1);
diff --git a/board/engicam/imx8mp/spl.c b/board/engicam/imx8mp/spl.c index 6a16d58ae5a..36b83aace39 100644 --- a/board/engicam/imx8mp/spl.c +++ b/board/engicam/imx8mp/spl.c @@ -95,9 +95,6 @@ int power_init_board(void) pmic_reg_write(p, PCA9450_BUCK6OUT, 0x18); #endif
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
- return 0; } #endif
diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c index b5a2faf3a18..6e9513805cd 100644 --- a/board/freescale/imx8mm_evk/spl.c +++ b/board/freescale/imx8mm_evk/spl.c @@ -99,9 +99,6 @@ static int power_init_board(void) /* set VDD_SNVS_0V8 from default 0.85V */ pmic_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
- return 0; }
diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c index 380abecd746..ec0378b5b76 100644 --- a/board/freescale/imx8mn_evk/spl.c +++ b/board/freescale/imx8mn_evk/spl.c @@ -95,9 +95,6 @@ int power_init_board(void) /* enable LDO4 to 1.2v */ pmic_reg_write(dev, PCA9450_LDO4CTRL, 0x44);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
- return 0; } #endif
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index f1b285417d0..246826a0d48 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -102,9 +102,6 @@ int power_init_board(void) /* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage 0.95v */ pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
- return 0; } #endif
diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c index 38cfbac6ea6..1aa2977b409 100644 --- a/board/freescale/imx93_evk/spl.c +++ b/board/freescale/imx93_evk/spl.c @@ -74,9 +74,6 @@ int power_init_board(void)
/* I2C_LT_EN*/ pmic_reg_write(dev, 0xa, 0x3);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1); return 0; } #endif
diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c index e06de8bb54c..60830766ca9 100644 --- a/board/gateworks/venice/spl.c +++ b/board/gateworks/venice/spl.c @@ -165,9 +165,6 @@ static int power_init_board(void) /* Kernel uses OD/OD freq for SOC */ /* To avoid timing risk from SOC to ARM, increase VDD_ARM to OD voltage 0.95v */ dm_i2c_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
/* set WDOG_B_CFG to cold reset */dm_i2c_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);}
else if ((!strncmp(model, "GW7901", 6)) ||
diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c index 25ee925ceb0..3a919d0a9c3 100644 --- a/board/kontron/sl-mx8mm/spl.c +++ b/board/kontron/sl-mx8mm/spl.c @@ -193,9 +193,6 @@ static int power_init_board(void) /* set VDD_SNVS_0V8 from default 0.85V to 0.8V */ pmic_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
- return 0; }
diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c index 210665bd6a9..9d54d60bb17 100644 --- a/board/toradex/verdin-imx8mm/spl.c +++ b/board/toradex/verdin-imx8mm/spl.c @@ -92,9 +92,6 @@ int power_init_board(void) /* increase VDD_DRAM to 0.975v for 1.5Ghz DDR */ pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1c);
/* set WDOG_B_CFG to cold reset */pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);pmic_reg_write(dev, PCA9450_CONFIG2, 0x1);
return 0;
diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c index 1838b464a0d..ea99e370850 100644 --- a/board/toradex/verdin-imx8mp/spl.c +++ b/board/toradex/verdin-imx8mp/spl.c @@ -116,9 +116,6 @@ int power_init_board(void) /* To avoid timing risk from SoC to ARM, increase VDD_ARM to OD voltage 0.95v */ pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1c);
- /* set WDOG_B_CFG to cold reset */
- pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
- /* set LDO4 and CONFIG2 to enable the I2C level translator */ pmic_reg_write(p, PCA9450_LDO4CTRL, 0x59); pmic_reg_write(p, PCA9450_CONFIG2, 0x1);
Reviewed-by: Peng Fan peng.fan@nxp.com