From the last time, I removed the patch about the PLL initialization because
it's board specific. I added a new patch for s3c440 gpio driver. Now in the board file we have no more magic bloat.
+/*
- When booting from NAND, it is impossible to access the lowest addresses
- due to the SteppingStone being in the way. Luckily the NOR doesn't really
- care about the highest 16 bits of address, so we set the controlers
- registers to go and poke over there, instead.
- */
+#define PHYS_FLASH_1 0x0 +#define CONFIG_SYS_FLASH_BASE 0x0
Urghh... this sounds very much like a serious design issue?
About this point, I ported it from the old version uboot as well. It may need some investigation, but I remember it was a big problem with this board. In the case of a NAND boot, we don't have access to NOR because the SteppingStone (SRAM) is mapped at the same range.
Gabriel Huau (2): Add GPIO Driver and IOMUX definition for S3C2440 Add support for MINI2440 (s3c2440).
MAINTAINERS | 4 + arch/arm/include/asm/arch-s3c24x0/gpio.h | 183 +++++++++++++++++++++++++ arch/arm/include/asm/arch-s3c24x0/iomux.h | 197 +++++++++++++++++++++++++++ board/friendlyarm/mini2440/Makefile | 44 ++++++ board/friendlyarm/mini2440/mini2440.c | 135 +++++++++++++++++++ board/friendlyarm/mini2440/mini2440.h | 144 ++++++++++++++++++++ boards.cfg | 1 + doc/README.mini2440 | 28 ++++ drivers/gpio/Makefile | 1 + drivers/gpio/s3c2440_gpio.c | 74 ++++++++++ include/configs/mini2440.h | 209 +++++++++++++++++++++++++++++ 11 files changed, 1020 insertions(+) create mode 100644 arch/arm/include/asm/arch-s3c24x0/gpio.h create mode 100644 arch/arm/include/asm/arch-s3c24x0/iomux.h create mode 100644 board/friendlyarm/mini2440/Makefile create mode 100644 board/friendlyarm/mini2440/mini2440.c create mode 100644 board/friendlyarm/mini2440/mini2440.h create mode 100644 doc/README.mini2440 create mode 100644 drivers/gpio/s3c2440_gpio.c create mode 100644 include/configs/mini2440.h