Hi Pali, Hi Kosta,
On 14.07.21 22:52, Pali Rohár wrote:
On Monday 03 May 2021 16:48:53 Tom Rini wrote:
With gcc-11 we see: drivers/ddr/marvell/a38x/ddr3_debug.c:672:47: error: argument 2 of type 'u32[5]' {aka 'unsigned int[5]'} with mismatched bound [-Werror=array-parameter=] 672 | int ddr3_tip_read_adll_value(u32 dev_num, u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM], | ~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h:10, from drivers/ddr/marvell/a38x/ddr3_init.h:17, from drivers/ddr/marvell/a38x/ddr3_debug.c:6: drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h:116:47: note: previously declared as 'u32[]' {aka 'unsigned int[]'}
And similar warnings. Correct these by updating the prototype. Remove the prototype for ddr3_tip_read_pup_value as it is unused.
Signed-off-by: Tom Rini trini@konsulko.com
drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h b/drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h index ab152cb455e9..55832a55405b 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h +++ b/drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h @@ -8,6 +8,7 @@
#include "ddr3_training_ip.h" #include "ddr3_training_ip_db.h" +#include "mv_ddr_plat.h"
#define KILLER_PATTERN_LENGTH 32 #define EXT_ACCESS_BURST_LENGTH 8 @@ -112,9 +113,12 @@ int ddr3_tip_configure_odpg(u32 dev_num, enum hws_access_type access_type, int ddr3_tip_write_mrs_cmd(u32 dev_num, u32 *cs_mask_arr, enum mr_number mr_num, u32 data, u32 mask); int ddr3_tip_write_cs_result(u32 dev_num, u32 offset); int ddr3_tip_reset_fifo_ptr(u32 dev_num); -int ddr3_tip_read_pup_value(u32 dev_num, u32 pup_values[], int reg_addr, u32 mask); -int ddr3_tip_read_adll_value(u32 dev_num, u32 pup_values[], u32 reg_addr, u32 mask); -int ddr3_tip_write_adll_value(u32 dev_num, u32 pup_values[], u32 reg_addr); +int ddr3_tip_read_adll_value(u32 dev_num,
u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],u32 reg_addr, u32 mask);+int ddr3_tip_write_adll_value(u32 dev_num,
u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],u32 reg_addr);int ddr3_tip_tune_training_params(u32 dev_num, struct tune_train_params *params);
#endif /* _DDR3_TRAINING_IP_FLOW_H_ */
CC Stefan, Marek, Konstantin
Could you please send this patch to upstream? https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell
Any change done in drivers/ddr/marvell/a38x cause issue in future code synchronization with upstream repository.
Sure. It absolutely makes sense to try to keep these repo's at least a bit in sync.
Kosta, could you please apply this patch to your "mv-ddr-marvell" repo as well?
Thanks, Stefan