On Wed, 12 Jul 2017 16:44:25 +0200 Maxime Ripard maxime.ripard@free-electrons.com wrote:
The A83T, just like the A33, has a USB phy with the phy_ctl at 0x410 instead of 0x404.
Suggested-by: Chen-Yu Tsai wens@csie.org Signed-off-by: Maxime Ripard maxime.ripard@free-electrons.com
arch/arm/mach-sunxi/usb_phy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c index 9bf0b5633d4a..1ca9739fbee3 100644 --- a/arch/arm/mach-sunxi/usb_phy.c +++ b/arch/arm/mach-sunxi/usb_phy.c @@ -19,7 +19,7 @@ #include <errno.h>
#define SUNXI_USB_PMU_IRQ_ENABLE 0x800 -#ifdef CONFIG_MACH_SUN8I_A33 +#if defined(CONFIG_MACH_SUN8I_A33) || defined(CONFIG_MACH_SUN8I_A83T) #define SUNXI_USB_CSR 0x410 #else #define SUNXI_USB_CSR 0x404
Is only A83T affected? Just in case, please check which SUNXI_USB_CSR value is needed for the other SoC variants and add these SoCs explicitly to the ifdef checks.
It also makes a lot of sense to get rid of the default #else clause, because having it there is very error prone when adding support for new SoCs. One may end up with a wrong default without noticing.