Le 24/09/2023 à 21:24, Simon Glass a écrit :
It doesn't make sense to have some boards do this differently. Drop the condition in the hope that the maintainers can figure out any run-time problems.
This was added by commit ea8256f072 ("SPL: Port SPL framework to powerpc"), and the commit log explains why.
Then commit 70e2aaf380 ("board_f: powerpc: Use timer_init() instead of init_timebase()") brought timer_init() to powerpc.
All timer_init() does it reset the timebase register to 0 instead of leaving a potentially random value. That should just be fine.
Therefore this change should be ok for powerpc.
Acked-by: Christophe Leroy christophe.leroy@csgroup.eu
This has been tested on qemu-ppce500
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v3:
- Mention testing on qemu-ppce500
Changes in v2:
Explicitly copy two maintainers as it seems only Mario was auto-cc'd
common/spl/spl.c | 6 ------ 1 file changed, 6 deletions(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c index 5cc86288145b..4233390d7de2 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -762,13 +762,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) if (spl_init()) hang(); } -#if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6)
- /*
* timer_init() does not exist on PPC systems. The timer is initialized* and enabled (decrementer) in interrupt_init() here.*/-#endif if (CONFIG_IS_ENABLED(BLOBLIST)) { ret = bloblist_init(); if (ret) {