From: Tang Yuantian yuantian.tang@freescale.com
For T4/B4, the clockgen node compatible string is updated to version 2.0. Add clock-frequency setting for this new version.
Signed-off-by: Tang Yuantian Yuantian.Tang@freescale.com --- v3: - update the compatible string from *-2 to *-2.0 v2: - fix the codestyle
arch/powerpc/cpu/mpc85xx/fdt.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 24eb978..b1aafac 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -663,6 +663,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_FSL_CORENET do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0", + "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); #endif
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);