On 09/15/2014 06:06 AM, Marek Vasut wrote:
Add some stub defines, which are used by the clock code, but are missing from the auto-generated header file for the SoCFPGA family.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@altera.com Cc: Albert Aribaud albert.u.boot@aribaud.net Cc: Tom Rini trini@ti.com Cc: Wolfgang Denk wd@denx.de Cc: Pavel Machek pavel@denx.de
board/altera/socfpga/pll_config.h | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/board/altera/socfpga/pll_config.h b/board/altera/socfpga/pll_config.h index 9bd0442..f0f59a9 100644 --- a/board/altera/socfpga/pll_config.h +++ b/board/altera/socfpga/pll_config.h @@ -94,6 +94,9 @@
/* Info for driver */ #define CONFIG_HPS_CLK_OSC1_HZ (25000000) +#define CONFIG_HPS_CLK_OSC2_HZ 0 +#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ 0 +#define CONFIG_HPS_CLK_F2S_PER_REF_HZ 0 #define CONFIG_HPS_CLK_MAINVCO_HZ (1600000000) #define CONFIG_HPS_CLK_PERVCO_HZ (1000000000) #ifdef CONFIG_SOCFPGA_ARRIA5
Acked-by: Dinh Nguyen dinguyen@opensource.altera.com
thanks...