11 Jun
2016
11 Jun
'16
12:22 a.m.
On 06/07/2016 07:42 PM, Yunhui Cui wrote:
From: Yunhui Cui yunhui.cui@nxp.com
The SP805-WDT module on LS2080A and LS2085A, requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. In order not to affect the sp805wdt driver frame, we enable the watchdog clk in advance.
Signed-off-by: Yunhui Cui yunhui.cui@nxp.com
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 12 ++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 + 2 files changed, 13 insertions(+)
Applied to fsl-qoriq master. Awaiting upstream. Thanks.
York