On Mon, May 25, 2015 at 9:30 PM, Belisko Marek marek.belisko@gmail.com wrote:
Hi,
I have custom am33xx board with phy connected to slave2 port. I copy'n'paste cpsw setup from /board/BuR/common/common.c but I'm using only slave2 port (RMII mode) so my cpsw_slave_data looks like:
static struct cpsw_slave_data cpsw_slaves[] = { { .slave_reg_ofs = 0x308, .sliver_reg_ofs = 0xdc0, .phy_addr = 4, }, };
with this configuration cpsw driver can detect link but it cannot establish any communication (tested with dhcp command). When I add to cpsw_slaves dummy slave1 port definition (with e.g. phy_addr = 0) it start working.
I forgot to mention that I also update mii_sel register following way: writel(RMII2_MODE_ENABLE | MII2_CLK_FROM_CHIP_PIN | RGMII2_NO_INTERNAL_DELAY | MII1_MODE_NOT_USED , &cdev->miisel);
from ref manul, MII2_CLK_FROM_CHIP_PIN(default is from chip pin),RGMII2_NO_INTERNAL_DELAY(just for rgmii mode),MII1_MODE_NOT_USED(suggest to set as same as gmii2_sel) like this: writel(RMII_MODE_ENABLE, &cdev->miisel);
mdio bus is working fine (tested with mdio list + mdio read). Pinmux is good as it works with dummy slave1 config. Any ideas what I'm doing wrong or why only slave2 port cannot be used? I grep whole source code but all boards using cpsw use slave1 only or slave1/slave2 configurations. Many thanks.
BR,
marek
-- as simple and primitive as possible
Marek Belisko - OPEN-NANDRA Freelance Developer
Ruska Nova Ves 219 | Presov, 08005 Slovak Republic Tel: +421 915 052 184 skype: marekwhite twitter: #opennandra web: http://open-nandra.com
BR,
marek
