This prevents the scenario where data cache is on and the device uses DMA to deploy data. In that case, it might not be possible to flush/invalidate data to RAM properly. The other option is to use bounce buffer, but that involves a lot of copying and therefore degrades performance rapidly. Therefore disallow this possibility of unaligned load address altogether if data cache is on.
Signed-off-by: Marek Vasut marex@denx.de Cc: Andy Fleming afleming@freescale.com --- common/cmd_mmc.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 750509d..a47baaa 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -268,6 +268,8 @@ int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
if (state != MMC_ERASE) { addr = (void *)simple_strtoul(argv[idx], NULL, 16); + if (!cacheline_aligned((ulong)addr)) + return 1; ++idx; } else addr = 0;