On 2023/4/22 09:23, Jonas Karlman wrote:
Enable pinctrl for sdmmc and sdhci in SPL to support loading of FIT image from SD and eMMC storage when booting from SPI NOR flash.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 56 ++++++++++++++++++++ configs/radxa-cm3-io-rk3566_defconfig | 3 +- 2 files changed, 58 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi index a8c31fecafd8..d2ee19aaa8d5 100644 --- a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi +++ b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi @@ -11,6 +11,62 @@ }; };
+&pinctrl {
- bootph-pre-ram;
+};
+&pcfg_pull_up {
- bootph-pre-ram;
+};
+&pcfg_pull_none {
- bootph-pre-ram;
+};
+&pcfg_pull_up_drv_level_2 {
- bootph-pre-ram;
+};
+&uart2m0_xfer {
- bootph-pre-ram;
+};
+&sdmmc0_bus4 {
- bootph-pre-ram;
+};
+&sdmmc0_clk {
- bootph-pre-ram;
+};
+&sdmmc0_cmd {
- bootph-pre-ram;
+};
+&sdmmc0_det {
- bootph-pre-ram;
+};
+&sdmmc0_pwren {
- bootph-pre-ram;
+};
+&emmc_bus8 {
- bootph-pre-ram;
+};
+&emmc_clk {
- bootph-pre-ram;
+};
+&emmc_cmd {
- bootph-pre-ram;
+};
+&emmc_datastrobe {
- bootph-pre-ram;
+};
- &sdhci { cap-mmc-highspeed; mmc-ddr-1_8v;
diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index dfaacbc8839e..dd1dd36a59b7 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -46,7 +46,7 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -63,6 +63,7 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_RK8XX=y