
18 Jul
2012
18 Jul
'12
5:49 p.m.
Le Tue, 17 Jul 2012 02:15:17 +0200, Javier Martinez Canillas javier@dowhile0.org a écrit :
+void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
u32 *mr)
+{
- *mr = MICRON_V_MR_165;
+#ifdef CONFIG_BOOT_NAND
- *mcfg = MICRON_V_MCFG_165(512 << 20);
- *ctrla = MICRON_V_ACTIMA_165;
- *ctrlb = MICRON_V_ACTIMB_165;
- *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
I thought the NAND version of the IGEPv2 was capable of using the 200 Mhz timings. At least, from the limited testing I had done, it seemed to work.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com