Adjust xHCI nodes to use the DWC3 core and the SoC-specific glue layer for former SoCs.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
Changes in v2: None
arch/arm/dts/uniphier-ph1-ld20.dtsi | 17 +++++++++++++++++ arch/arm/dts/uniphier-ph1-pro4-ref.dts | 4 ++++ arch/arm/dts/uniphier-ph1-pro4.dtsi | 32 ++++++++++++++++++++++++-------- arch/arm/dts/uniphier-ph1-pro5.dtsi | 32 ++++++++++++++++++++++++-------- arch/arm/dts/uniphier-proxstream2.dtsi | 32 ++++++++++++++++++++++++-------- 5 files changed, 93 insertions(+), 24 deletions(-)
diff --git a/arch/arm/dts/uniphier-ph1-ld20.dtsi b/arch/arm/dts/uniphier-ph1-ld20.dtsi index f9cc3c4..5e2b595 100644 --- a/arch/arm/dts/uniphier-ph1-ld20.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld20.dtsi @@ -256,6 +256,23 @@ #interrupt-cells = <3>; interrupts = <1 9 4>; }; + + usb: usb@65b00000 { + compatible = "socionext,uniphier-ld20-dwc3"; + reg = <0x65b00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, + <&pinctrl_usb2>, <&pinctrl_usb3>; + dwc3@65a00000 { + compatible = "snps,dwc3"; + reg = <0x65a00000 0x10000>; + interrupts = <0 134 4>; + tx-fifo-resize; + }; + }; }; };
diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts index 5be76e2..6cc5d1e 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts @@ -71,6 +71,10 @@ status = "okay"; };
+&usb1 { + status = "okay"; +}; + &usb2 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi index d5767b6..7f42bc2 100644 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi @@ -400,22 +400,38 @@ clocks = <&mio 4>, <&mio 6>; };
- usb0: usb@65a00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; + usb0: usb@65b00000 { + compatible = "socionext,uniphier-pro4-dwc3"; status = "disabled"; - reg = <0x65a00000 0x100>; - interrupts = <0 134 4>; + reg = <0x65b00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>; + dwc3@65a00000 { + compatible = "snps,dwc3"; + reg = <0x65a00000 0x10000>; + interrupts = <0 134 4>; + tx-fifo-resize; + }; };
- usb1: usb@65c00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; + usb1: usb@65d00000 { + compatible = "socionext,uniphier-pro4-dwc3"; status = "disabled"; - reg = <0x65c00000 0x100>; - interrupts = <0 137 4>; + reg = <0x65d00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>; + dwc3@65c00000 { + compatible = "snps,dwc3"; + reg = <0x65c00000 0x10000>; + interrupts = <0 137 4>; + tx-fifo-resize; + }; }; };
diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi index bd1b4b1..3036a76 100644 --- a/arch/arm/dts/uniphier-ph1-pro5.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi @@ -379,22 +379,38 @@ bus-width = <4>; };
- usb0: usb@65a00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; + usb0: usb@65b00000 { + compatible = "socionext,uniphier-pro5-dwc3"; status = "disabled"; - reg = <0x65a00000 0x100>; - interrupts = <0 134 4>; + reg = <0x65b00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>; + dwc3@65a00000 { + compatible = "snps,dwc3"; + reg = <0x65a00000 0x10000>; + interrupts = <0 134 4>; + tx-fifo-resize; + }; };
- usb1: usb@65c00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; + usb1: usb@65d00000 { + compatible = "socionext,uniphier-pro5-dwc3"; status = "disabled"; - reg = <0x65c00000 0x100>; - interrupts = <0 137 4>; + reg = <0x65d00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>; + dwc3@65c00000 { + compatible = "snps,dwc3"; + reg = <0x65c00000 0x10000>; + interrupts = <0 137 4>; + tx-fifo-resize; + }; }; };
diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi index 12968bd..8cff09c 100644 --- a/arch/arm/dts/uniphier-proxstream2.dtsi +++ b/arch/arm/dts/uniphier-proxstream2.dtsi @@ -383,22 +383,38 @@ bus-width = <4>; };
- usb0: usb@65a00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; + usb0: usb@65b00000 { + compatible = "socionext,uniphier-pxs2-dwc3"; status = "disabled"; - reg = <0x65a00000 0x100>; - interrupts = <0 134 4>; + reg = <0x65b00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; + dwc3@65a00000 { + compatible = "snps,dwc3"; + reg = <0x65a00000 0x10000>; + interrupts = <0 134 4>; + tx-fifo-resize; + }; };
- usb1: usb@65c00000 { - compatible = "socionext,uniphier-xhci", "generic-xhci"; + usb1: usb@65d00000 { + compatible = "socionext,uniphier-pxs2-dwc3"; status = "disabled"; - reg = <0x65c00000 0x100>; - interrupts = <0 137 4>; + reg = <0x65d00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; + dwc3@65c00000 { + compatible = "snps,dwc3"; + reg = <0x65c00000 0x10000>; + interrupts = <0 137 4>; + tx-fifo-resize; + }; }; };