Rockchip rk3399 using arasan sdhci-5.1 controller. This patch add the controller support to enable mmc device and tested on rk3399 evb board.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
Changes in v2: None
drivers/mmc/Kconfig | 6 +++++ drivers/mmc/Makefile | 1 + drivers/mmc/rockchip_sdhci.c | 58 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 65 insertions(+) create mode 100644 drivers/mmc/rockchip_sdhci.c
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c80efc3..75c2d92 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -52,6 +52,12 @@ config ZYNQ_SDHCI help Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform
+config ROCKCHIP_SDHCI + bool "Arasan SDHCI controller for Rockchip support" + depends on DM_MMC && OF_CONTROL + help + Support for Arasan SDHCI host controller on Rockchip ARM SoCs platform + config MMC_UNIPHIER bool "UniPhier SD/MMC Host Controller support" depends on ARCH_UNIPHIER diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 3da4817..7cb2ab0 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -53,6 +53,7 @@ obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o +obj-$(CONFIG_ROCKCHIP_SDHCI) += rockchip_sdhci.o
ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c new file mode 100644 index 0000000..bee269d --- /dev/null +++ b/drivers/mmc/rockchip_sdhci.c @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2016 Fuzhou Rockchip Electronics Co., Ltd + * + * Rockchip SD Host Controller Interface + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <fdtdec.h> +#include <libfdt.h> +#include <malloc.h> +#include <sdhci.h> + +/* 400KHz is max freq for card ID etc. Use that as min */ +#define EMMC_MIN_FREQ 400000 + +static int arasan_sdhci_probe(struct udevice *dev) +{ + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct sdhci_host *host = dev_get_priv(dev); + + + host->version = sdhci_readw(host, SDHCI_HOST_VERSION); + host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD; + + add_sdhci(host, CONFIG_ROCKCHIP_SDHCI_MAX_FREQ, EMMC_MIN_FREQ); + + upriv->mmc = host->mmc; + host->mmc->dev = dev; + + return 0; +} + +static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) +{ + struct sdhci_host *host = dev_get_priv(dev); + + host->name = dev->name; + host->ioaddr = (void *)dev_get_addr(dev); + + return 0; +} + +static const struct udevice_id arasan_sdhci_ids[] = { + { .compatible = "arasan,sdhci-5.1" }, + { } +}; + +U_BOOT_DRIVER(arasan_sdhci_drv) = { + .name = "arasan_sdhci", + .id = UCLASS_MMC, + .of_match = arasan_sdhci_ids, + .ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata, + .probe = arasan_sdhci_probe, + .priv_auto_alloc_size = sizeof(struct sdhci_host), +};