[PATCH v3 08/16] board: ti: j784s4: Add board support for J784S4 EVM

Add board files for J784S4 EVM.

Signed-off-by: Hari Nagalla hnagalla@ti.com [ add env and board specific yaml files for binman ] Signed-off-by: Neha Malcom Francis n-francis@ti.com [ cleaned up the env files ] Signed-off-by: Manorit Chawdhry m-chawdhry@ti.com Signed-off-by: Apurva Nandan a-nandan@ti.com --- arch/arm/mach-k3/Kconfig | 1 + board/ti/j784s4/Kconfig | 63 + board/ti/j784s4/MAINTAINERS | 20 + board/ti/j784s4/Makefile | 8 + board/ti/j784s4/board-cfg.yaml | 36 + board/ti/j784s4/evm.c | 87 + board/ti/j784s4/j784s4.env | 35 + board/ti/j784s4/pm-cfg.yaml | 12 + board/ti/j784s4/rm-cfg.yaml | 3057 ++++++++++++++++++++++++++++++ board/ti/j784s4/sec-cfg.yaml | 379 ++++ board/ti/j784s4/tifs-rm-cfg.yaml | 2655 ++++++++++++++++++++++++++ include/configs/j784s4_evm.h | 20 + 12 files changed, 6373 insertions(+) create mode 100644 board/ti/j784s4/Kconfig create mode 100644 board/ti/j784s4/MAINTAINERS create mode 100644 board/ti/j784s4/Makefile create mode 100644 board/ti/j784s4/board-cfg.yaml create mode 100644 board/ti/j784s4/evm.c create mode 100644 board/ti/j784s4/j784s4.env create mode 100644 board/ti/j784s4/pm-cfg.yaml create mode 100644 board/ti/j784s4/rm-cfg.yaml create mode 100644 board/ti/j784s4/sec-cfg.yaml create mode 100644 board/ti/j784s4/tifs-rm-cfg.yaml create mode 100644 include/configs/j784s4_evm.h

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 0af2ec6ddb..ba3dd393e3 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -197,4 +197,5 @@ source "board/ti/j721e/Kconfig" source "board/siemens/iot2050/Kconfig" source "board/ti/j721s2/Kconfig" source "board/toradex/verdin-am62/Kconfig" +source "board/ti/j784s4/Kconfig" endif diff --git a/board/ti/j784s4/Kconfig b/board/ti/j784s4/Kconfig new file mode 100644 index 0000000000..7eeb21f451 --- /dev/null +++ b/board/ti/j784s4/Kconfig @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# Hari Nagalla hnagalla@ti.com + +choice + prompt "K3 J784S4 board" + optional + +config TARGET_J784S4_A72_EVM + bool "TI K3 based J784S4 EVM running on A72" + select ARM64 + select SOC_K3_J784S4 + select BOARD_LATE_INIT + select SYS_DISABLE_DCACHE_OPS + select BINMAN + +config TARGET_J784S4_R5_EVM + bool "TI K3 based J784S4 EVM running on R5" + select CPU_V7R + select SYS_THUMB_BUILD + select SOC_K3_J784S4 + select K3_LOAD_SYSFW + select RAM + select SPL_RAM + select K3_DDRSS + select BINMAN + imply SYS_K3_SPL_ATF + +endchoice + +if TARGET_J784S4_A72_EVM + +config SYS_BOARD + default "j784s4" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "j784s4_evm" + +source "board/ti/common/Kconfig" + +endif + +if TARGET_J784S4_R5_EVM + +config SYS_BOARD + default "j784s4" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "j784s4_evm" + +config SPL_LDSCRIPT + default "arch/arm/mach-omap2/u-boot-spl.lds" + +source "board/ti/common/Kconfig" + +endif diff --git a/board/ti/j784s4/MAINTAINERS b/board/ti/j784s4/MAINTAINERS new file mode 100644 index 0000000000..7d3549dd31 --- /dev/null +++ b/board/ti/j784s4/MAINTAINERS @@ -0,0 +1,20 @@ +J784S4 BOARD +M: Hari Nagalla hnagalla@ti.com +S: Maintained +F: board/ti/j784s4 +F: arch/arm/mach-k3/j784s4 +F: include/configs/j784s4_evm.h +F: configs/j784s4_evm_r5_defconfig +F: configs/j784s4_evm_a72_defconfig +F: arch/arm/dts/k3-j784s4.dtsi +F: arch/arm/dts/k3-j784s4-main.dtsi +F: arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi +F: arch/arm/dts/k3-j784s4-thermal.dtsi +F: arch/arm/dts/k3-j784s4-evm.dts +F: arch/arm/dts/k3-j784s4-evm-u-boot.dtsi +F: arch/arm/dts/k3-j784s4-r5-evm.dts +F: arch/arm/dts/k3-j784s4-ddr.dtsi +F: arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi +F: arch/arm/dts/k3-am69-sk.dts +F: arch/arm/dts/k3-am69-sk-u-boot.dtsi +F: arch/arm/dts/k3-am69-r5-sk.dts diff --git a/board/ti/j784s4/Makefile b/board/ti/j784s4/Makefile new file mode 100644 index 0000000000..fc98b24a2d --- /dev/null +++ b/board/ti/j784s4/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# Hari Nagalla hnagalla@ti.com +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += evm.o diff --git a/board/ti/j784s4/board-cfg.yaml b/board/ti/j784s4/board-cfg.yaml new file mode 100644 index 0000000000..ea9a8b4a26 --- /dev/null +++ b/board/ti/j784s4/board-cfg.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for J784S4 +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable: 0x5A + main_isolation_hostid: 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor: 0x1 + scaling_profile: 0x1 + disable_main_nav_secure_proxy: 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size: 0x8 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables: 0x00 + trace_src_enables: 0x00 \ No newline at end of file diff --git a/board/ti/j784s4/evm.c b/board/ti/j784s4/evm.c new file mode 100644 index 0000000000..d6e695f183 --- /dev/null +++ b/board/ti/j784s4/evm.c @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Board specific initialization for J784S4 EVM + * + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + * Hari Nagalla hnagalla@ti.com + * + */ + +#include <common.h> +#include <env.h> +#include <fdt_support.h> +#include <generic-phy.h> +#include <image.h> +#include <init.h> +#include <log.h> +#include <net.h> +#include <asm/arch/hardware.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <spl.h> +#include <dm.h> +#include <dm/uclass-internal.h> + +#include "../common/board_detect.h" + +#define board_is_j784s4_evm() board_ti_k3_is("J784S4-EVM") + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ +#ifdef CONFIG_PHYS_64BIT + gd->ram_size = 0x100000000; +#else + gd->ram_size = 0x80000000; +#endif + + return 0; +} + +phys_size_t board_get_usable_ram_top(phys_size_t total_size) +{ +#ifdef CONFIG_PHYS_64BIT + /* Limit RAM used by U-Boot to the DDR low region */ + if (gd->ram_top > 0x100000000) + return 0x100000000; +#endif + + return gd->ram_top; +} + +int dram_init_banksize(void) +{ + /* Bank 0 declares the memory available in the DDR low region */ + gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = 0x7fffffff; + gd->ram_size = 0x80000000; + +#ifdef CONFIG_PHYS_64BIT + /* Bank 1 declares the memory available in the DDR high region */ + gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; + gd->bd->bi_dram[1].size = 0x77fffffff; + gd->ram_size = 0x800000000; +#endif + + return 0; +} + +int board_late_init(void) +{ + if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) { + setup_board_eeprom_env(); + setup_serial(); + } + + return 0; +} + +void spl_board_init(void) +{ +} diff --git a/board/ti/j784s4/j784s4.env b/board/ti/j784s4/j784s4.env new file mode 100644 index 0000000000..07e1a2ab3c --- /dev/null +++ b/board/ti/j784s4/j784s4.env @@ -0,0 +1,35 @@ +#include <env/ti/ti_armv7_common.env> +#include <env/ti/mmc.env> +#include <env/ti/ufs.env> +#include <env/ti/k3_dfu.env> + +#if CONFIG_CMD_REMOTEPROC +#include <env/ti/k3_rproc.env> +#endif + +default_device_tree=ti/k3-j784s4-evm.dtb +findfdt= + setenv name_fdt ${default_device_tree}; + if test $board_name = j784s4; then + setenv name_fdt ti/k3-j784s4-evm.dtb; fi; + setenv fdtfile ${name_fdt} +name_kern=Image +console=ttyS2,115200n8 +args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02880000 + ${mtdparts} +run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} + +boot_targets=ti_mmc mmc0 mmc1 usb pxe dhcp +boot=mmc +mmcdev=1 +dorprocboot=1 +bootpart=1:2 +bootdir=/boot +rd_spec=- + +rproc_fw_binaries= 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw + +splashfile=ti.gz +splashimage=0x82000000 +splashpos=m,m +splashsource=mmc diff --git a/board/ti/j784s4/pm-cfg.yaml b/board/ti/j784s4/pm-cfg.yaml new file mode 100644 index 0000000000..5d32453564 --- /dev/null +++ b/board/ti/j784s4/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for J784S4 +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 \ No newline at end of file diff --git a/board/ti/j784s4/rm-cfg.yaml b/board/ti/j784s4/rm-cfg.yaml new file mode 100644 index 0000000000..0ec092ab56 --- /dev/null +++ b/board/ti/j784s4/rm-cfg.yaml @@ -0,0 +1,3057 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J784S4 +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size : 356 + host_cfg_entries: + - #1 + host_id: 3 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #2 + host_id: 5 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #3 + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #4 + host_id: 13 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #5 + host_id: 21 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #6 + host_id: 23 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #7 + host_id: 25 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #8 + host_id: 27 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #9 + host_id: 35 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #10 + host_id: 37 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #11 + host_id: 40 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #12 + host_id: 42 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #13 + host_id: 45 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #14 + host_id: 47 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #15 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #16 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - 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https://www.ti.com/ +# +# Security management configuration for J784S4 +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - #1 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - #1 + host_id: 0 + supervisor_host_id: 0 + - #2 + host_id: 0 + supervisor_host_id: 0 + - #3 + host_id: 0 + supervisor_host_id: 0 + - #4 + host_id: 0 + supervisor_host_id: 0 + - #5 + host_id: 0 + supervisor_host_id: 0 + - #6 + host_id: 0 + supervisor_host_id: 0 + - #7 + host_id: 0 + supervisor_host_id: 0 + - #8 + host_id: 0 + supervisor_host_id: 0 + - #9 + host_id: 0 + supervisor_host_id: 0 + - #10 + host_id: 0 + supervisor_host_id: 0 + - #11 + host_id: 0 + supervisor_host_id: 0 + - #12 + host_id: 0 + supervisor_host_id: 0 + - #13 + host_id: 0 + supervisor_host_id: 0 + - #14 + host_id: 0 + supervisor_host_id: 0 + - #15 + host_id: 0 + supervisor_host_id: 0 + - #16 + host_id: 0 + supervisor_host_id: 0 + - #17 + host_id: 0 + supervisor_host_id: 0 + - #18 + host_id: 0 + supervisor_host_id: 0 + - #19 + host_id: 0 + supervisor_host_id: 0 + - #20 + host_id: 0 + supervisor_host_id: 0 + - #21 + host_id: 0 + supervisor_host_id: 0 + - #22 + host_id: 0 + supervisor_host_id: 0 + - #23 + host_id: 0 + supervisor_host_id: 0 + - #24 + host_id: 0 + supervisor_host_id: 0 + - #25 + host_id: 0 + supervisor_host_id: 0 + - #26 + host_id: 0 + supervisor_host_id: 0 + - #27 + host_id: 0 + supervisor_host_id: 0 + - #28 + host_id: 0 + supervisor_host_id: 0 + - #29 + host_id: 0 + supervisor_host_id: 0 + - #30 + host_id: 0 + supervisor_host_id: 0 + - #31 + host_id: 0 + supervisor_host_id: 0 + - #32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id: 0 + otp_entry: + - #1 + host_id: 0 + host_perms: 0 + - #2 + host_id: 0 + host_perms: 0 + - #3 + host_id: 0 + host_perms: 0 + - #4 + host_id: 0 + host_perms: 0 + - #5 + host_id: 0 + host_perms: 0 + - #6 + host_id: 0 + host_perms: 0 + - #7 + host_id: 0 + host_perms: 0 + - #8 + host_id: 0 + host_perms: 0 + - #9 + host_id: 0 + host_perms: 0 + - #10 + host_id: 0 + host_perms: 0 + - #11 + host_id: 0 + host_perms: 0 + - #12 + host_id: 0 + host_perms: 0 + - #13 + host_id: 0 + host_perms: 0 + - #14 + host_id: 0 + host_perms: 0 + - #15 + host_id: 0 + host_perms: 0 + - #16 + host_id: 0 + host_perms: 0 + - #17 + host_id: 0 + host_perms: 0 + - #18 + host_id: 0 + host_perms: 0 + - #19 + host_id: 0 + host_perms: 0 + - #20 + host_id: 0 + host_perms: 0 + - #21 + host_id: 0 + host_perms: 0 + - #22 + host_id: 0 + host_perms: 0 + - #23 + host_id: 0 + host_perms: 0 + - #24 + host_id: 0 + host_perms: 0 + - #25 + host_id: 0 + host_perms: 0 + - #26 + host_id: 0 + host_perms: 0 + - #27 + host_id: 0 + host_perms: 0 + - #28 + host_id: 0 + host_perms: 0 + - #29 + host_id: 0 + host_perms: 0 + - #30 + host_id: 0 + host_perms: 0 + - #31 + host_id: 0 + host_perms: 0 + - #32 + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci : 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size : 0 + auth_resource_owner: 0 + enable_saul_psil_global_config_writes: 0 + rsvd: [0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock : 0x0 + allow_wildcard_unlock : 0x0 + allowed_debug_level_rsvd: 0 + rsvd: 0 + min_cert_rev : 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender : 0 + handover_to_host_id : 0 + rsvd: [0, 0, 0, 0] \ No newline at end of file diff --git a/board/ti/j784s4/tifs-rm-cfg.yaml b/board/ti/j784s4/tifs-rm-cfg.yaml new file mode 100644 index 0000000000..c2da58ffa2 --- /dev/null +++ b/board/ti/j784s4/tifs-rm-cfg.yaml @@ -0,0 +1,2655 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J784S4 +# + +--- + +tifs-rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj : 0x0 + boardcfg_abi_min : 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size : 356 + host_cfg_entries: + - #1 + host_id: 3 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #2 + host_id: 5 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #3 + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #4 + host_id: 13 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #5 + host_id: 21 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #6 + host_id: 23 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #7 + host_id: 25 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #8 + host_id: 27 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #9 + host_id: 35 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #10 + host_id: 37 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #11 + host_id: 40 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #12 + host_id: 42 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #13 + host_id: 45 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #14 + host_id: 47 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #15 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #16 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #17 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #18 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #19 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #20 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - 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https://www.ti.com/ + * Hari Nagalla hnagalla@ti.com + */ + +#ifndef __CONFIG_J784S4_EVM_H +#define __CONFIG_J784S4_EVM_H + +#include <linux/sizes.h> + +/* DDR Configuration */ +#define CFG_SYS_SDRAM_BASE1 0x880000000 + +/* Now for the remaining common defines */ +#include <configs/ti_armv7_common.h> + +#endif /* __CONFIG_J784S4_EVM_H */