Spin table is at the very beginning of boot page. All cores are released by the first entry address. If individual entry address is needed, undef CONFIG_FSL_SMP_RELEASE_ALL. FDT fixup is called to update spin table address.
Signed-off-by: York Sun yorksun@freescale.com --- This set depends on this bundle http://patchwork.ozlabs.org/bundle/yorksun/armv8_fsl-lsch3/
board/freescale/ls2085a/ls2085a.c | 2 ++ include/configs/ls2085a_common.h | 2 ++ 2 files changed, 4 insertions(+)
diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c index a18db1d..3daa787 100644 --- a/board/freescale/ls2085a/ls2085a.c +++ b/board/freescale/ls2085a/ls2085a.c @@ -88,6 +88,8 @@ void ft_board_setup(void *blob, bd_t *bd) phys_addr_t base; phys_size_t size;
+ ft_cpu_setup(blob, bd); + /* limit the memory size to bank 1 until Linux can handle 40-bit PA */ base = getenv_bootm_low(); size = getenv_bootm_size(); diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 49e2971..6da431f 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -56,6 +56,7 @@ */ #define SECONDARY_CPU_BOOT_PAGE (CONFIG_SYS_SDRAM_BASE) #define CPU_RELEASE_ADDR SECONDARY_CPU_BOOT_PAGE +#define CONFIG_FSL_SMP_RELEASE_ALL
/* Generic Timer Definitions */ #define COUNTER_FREQUENCY 12000000 /* 12MHz */ @@ -171,6 +172,7 @@
/* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) +#define CONFIG_ARCH_EARLY_INIT_R
/* Physical Memory Map */ /* fixme: these need to be checked against the board */