This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with RDIMM MTA18ASF2G72PDZ and MTA9ASF1G72PZ.
Signed-off-by: York Sun york.sun@nxp.com
---
Changes in v4: Adjust write leveling start to align with timing_cfg_7[PAR_LAT]. Add single rank RDIMM. Remove RCW override in board file. Modify cpo value slightly to fit both UDIMM and RDIMM.
Changes in v3: Update register control words for different speeds.
Changes in v2: Update timing table for lower speeds
board/freescale/ls1046ardb/ddr.c | 9 +++++---- board/freescale/ls1046ardb/ddr.h | 19 +++++++++++++++++++ 2 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c index fb4f6ab..46ed7bd 100644 --- a/board/freescale/ls1046ardb/ddr.c +++ b/board/freescale/ls1046ardb/ddr.c @@ -29,7 +29,10 @@ void fsl_ddr_board_options(memctl_options_t *popts, if (!pdimm->n_ranks) return;
- pbsp = udimms[0]; + if (popts->registered_dimm_en) + pbsp = rdimms[0]; + else + pbsp = udimms[0];
/* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr * freqency and n_banks specified in board_specific_parameters table. @@ -66,8 +69,6 @@ found: pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb);
popts->data_bus_width = 0; /* 64-bit data bus */ - popts->otf_burst_chop_en = 0; - popts->burst_length = DDR_BL8; popts->bstopre = 0; /* enable auto precharge */
/* @@ -94,7 +95,7 @@ found: DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
/* optimize cpo for erratum A-009942 */ - popts->cpo_sample = 0x70; + popts->cpo_sample = 0x61; }
int fsl_initdram(void) diff --git a/board/freescale/ls1046ardb/ddr.h b/board/freescale/ls1046ardb/ddr.h index 9e440f6..04328f2 100644 --- a/board/freescale/ls1046ardb/ddr.h +++ b/board/freescale/ls1046ardb/ddr.h @@ -41,4 +41,23 @@ static const struct board_specific_parameters *udimms[] = { udimm0, };
+static const struct board_specific_parameters rdimm0[] = { + /* + * memory controller 0 + * num| hi| rank| clk| wrlvl | wrlvl | wrlvl + * ranks| mhz| GB |adjst| start | ctl2 | ctl3 + */ + {2, 1666, 0, 0x8, 0x0D, 0x0C0B0A08, 0x0A0B0C08,}, + {2, 1900, 0, 0x8, 0x0E, 0x0D0C0B09, 0x0B0C0D09,}, + {2, 2300, 0, 0xa, 0x12, 0x100F0D0C, 0x0E0F100C,}, + {1, 1666, 0, 0x8, 0x0D, 0x0C0B0A08, 0x0A0B0C08,}, + {1, 1900, 0, 0x8, 0x0E, 0x0D0C0B09, 0x0B0C0D09,}, + {1, 2300, 0, 0xa, 0x12, 0x100F0D0C, 0x0E0F100C,}, + {} +}; + +static const struct board_specific_parameters *rdimms[] = { + rdimm0, +}; + #endif