Move Stratix10 and Agilex system manager common code to system_manager_soc64.h.
Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
--- v3: - Change filename to system_manager_soc64.h - Move to use defines instead of struct.
v2: - Move common defines for Stratix 10 and Agilex to system_manager_s10_agilex_common.h --- .../include/mach/system_manager_s10.h | 114 +----------------- ...m_manager_s10.h => system_manager_soc64.h} | 13 +- 2 files changed, 8 insertions(+), 119 deletions(-) copy arch/arm/mach-socfpga/include/mach/{system_manager_s10.h => system_manager_soc64.h} (95%)
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h index cb5ccda620..c537fb300c 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h @@ -1,122 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0 * - * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * Copyright (C) 2016-2019 Intel Corporation <www.intel.com> * */
#ifndef _SYSTEM_MANAGER_S10_ #define _SYSTEM_MANAGER_S10_
-void sysmgr_pinmux_init(void); -void populate_sysmgr_fpgaintf_module(void); -void populate_sysmgr_pinmux(void); -void sysmgr_pinmux_table_sel(const u32 **table, unsigned int *table_len); -void sysmgr_pinmux_table_ctrl(const u32 **table, unsigned int *table_len); -void sysmgr_pinmux_table_fpga(const u32 **table, unsigned int *table_len); -void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len); - -#define SYSMGR_WDDBG 0x8 -#define SYSMGR_DMA 0x20 -#define SYSMGR_DMA_PERIPH 0x24 -#define SYSMGR_SDMMC 0x28 -#define SYSMGR_SDMMC_L3MASTER 0x2c -#define SYSMGR_EMAC_GLOBAL 0x40 -#define SYSMGR_EMAC0 0x44 -#define SYSMGR_EMAC1 0x48 -#define SYSMGR_EMAC2 0x4c -#define SYSMGR_EMAC0_ACE 0x50 -#define SYSMGR_EMAC1_ACE 0x54 -#define SYSMGR_EMAC2_ACE 0x58 -#define SYSMGR_NAND_AXUSER 0x5c -#define SYSMGR_FPGAINTF_EN1 0x68 -#define SYSMGR_FPGAINTF_EN2 0x6c -#define SYSMGR_FPGAINTF_EN3 0x70 -#define SYSMGR_DMA_L3MASTER 0x74 -#define SYSMGR_HMC_CLK 0xb4 -#define SYSMGR_IO_PA_CTRL 0xb8 -#define SYSMGR_NOC_TIMEOUT 0xc0 -#define SYSMGR_NOC_IDLEREQ_SET 0xc4 -#define SYSMGR_NOC_IDLEREQ_CLR 0xc8 -#define SYSMGR_NOC_IDLEREQ_VAL 0xcc -#define SYSMGR_NOC_IDLEACK 0xd0 -#define SYSMGR_NOC_IDLESTATUS 0xd4 -#define SYSMGR_FPGA2SOC_CTRL 0xd8 -#define SYSMGR_FPGA_CONFIG 0xdc -#define SYSMGR_IOCSRCLK_GATE 0xe0 -#define SYSMGR_GPO 0xe4 -#define SYSMGR_GPI 0xe8 -#define SYSMGR_MPU 0xf0 -#define SYSMGR_BOOT_SCRATCH_COLD0 0x200 -#define SYSMGR_BOOT_SCRATCH_COLD1 0x204 -#define SYSMGR_BOOT_SCRATCH_COLD2 0x208 -#define SYSMGR_BOOT_SCRATCH_COLD3 0x20c -#define SYSMGR_BOOT_SCRATCH_COLD4 0x210 -#define SYSMGR_BOOT_SCRATCH_COLD5 0x214 -#define SYSMGR_BOOT_SCRATCH_COLD6 0x218 -#define SYSMGR_BOOT_SCRATCH_COLD7 0x21c -#define SYSMGR_BOOT_SCRATCH_COLD8 0x220 -#define SYSMGR_BOOT_SCRATCH_COLD9 0x224 -#define SYSMGR_PINSEL0 0x1000 -#define SYSMGR_IOCTRL0 0x1130 -#define SYSMGR_EMAC0_USEFPGA 0x1300 -#define SYSMGR_EMAC1_USEFPGA 0x1304 -#define SYSMGR_EMAC2_USEFPGA 0x1308 -#define SYSMGR_I2C0_USEFPGA 0x130c -#define SYSMGR_I2C1_USEFPGA 0x1310 -#define SYSMGR_I2C_EMAC0_USEFPGA 0x1314 -#define SYSMGR_I2C_EMAC1_USEFPGA 0x1318 -#define SYSMGR_I2C_EMAC2_USEFPGA 0x131c -#define SYSMGR_NAND_USEFPGA 0x1320 -#define SYSMGR_SPIM0_USEFPGA 0x1328 -#define SYSMGR_SPIM1_USEFPGA 0x132c -#define SYSMGR_SPIS0_USEFPGA 0x1330 -#define SYSMGR_SPIS1_USEFPGA 0x1334 -#define SYSMGR_UART0_USEFPGA 0x1338 -#define SYSMGR_UART1_USEFPGA 0x133c -#define SYSMGR_MDIO0_USEFPGA 0x1340 -#define SYSMGR_MDIO1_USEFPGA 0x1344 -#define SYSMGR_MDIO2_USEFPGA 0x1348 -#define SYSMGR_JTAG_USEFPGA 0x1350 -#define SYSMGR_SDMMC_USEFPGA 0x1354 -#define SYSMGR_HPS_OSC_CLK 0x1358 -#define SYSMGR_IODELAY0 0x1400 - -#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX BIT(0) -#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO BIT(1) -#define SYSMGR_ECC_OCRAM_EN BIT(0) -#define SYSMGR_ECC_OCRAM_SERR BIT(3) -#define SYSMGR_ECC_OCRAM_DERR BIT(4) -#define SYSMGR_FPGAINTF_USEFPGA 0x1 - -#define SYSMGR_FPGAINTF_NAND BIT(4) -#define SYSMGR_FPGAINTF_SDMMC BIT(8) -#define SYSMGR_FPGAINTF_SPIM0 BIT(16) -#define SYSMGR_FPGAINTF_SPIM1 BIT(24) -#define SYSMGR_FPGAINTF_EMAC0 BIT(0) -#define SYSMGR_FPGAINTF_EMAC1 BIT(8) -#define SYSMGR_FPGAINTF_EMAC2 BIT(16) - -#define SYSMGR_SDMMC_SMPLSEL_SHIFT 4 -#define SYSMGR_SDMMC_DRVSEL_SHIFT 0 - -/* EMAC Group Bit definitions */ -#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0 -#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1 -#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII 0x2 - -#define SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB 0 -#define SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB 2 -#define SYSMGR_EMACGRP_CTRL_PHYSEL_MASK 0x3 - -#define SYSMGR_NOC_H2F_MSK 0x00000001 -#define SYSMGR_NOC_LWH2F_MSK 0x00000010 -#define SYSMGR_HMC_CLK_STATUS_MSK 0x00000001 - -#define SYSMGR_DMA_IRQ_NS 0xFF000000 -#define SYSMGR_DMA_MGR_NS 0x00010000 - -#define SYSMGR_DMAPERIPH_ALL_NS 0xFFFFFFFF - -#define SYSMGR_WDDBG_PAUSE_ALL_CPU 0x0F0F0F0F +#include <asm/arch/system_manager_soc64.h>
#endif /* _SYSTEM_MANAGER_S10_ */ diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h similarity index 95% copy from arch/arm/mach-socfpga/include/mach/system_manager_s10.h copy to arch/arm/mach-socfpga/include/mach/system_manager_soc64.h index cb5ccda620..a24b652823 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h @@ -1,11 +1,10 @@ -/* SPDX-License-Identifier: GPL-2.0 - * - * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> - * +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 Intel Corporation <www.intel.com> */
-#ifndef _SYSTEM_MANAGER_S10_ -#define _SYSTEM_MANAGER_S10_ +#ifndef _SYSTEM_MANAGER_SOC64_H_ +#define _SYSTEM_MANAGER_SOC64_H_
void sysmgr_pinmux_init(void); void populate_sysmgr_fpgaintf_module(void); @@ -119,4 +118,4 @@ void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len);
#define SYSMGR_WDDBG_PAUSE_ALL_CPU 0x0F0F0F0F
-#endif /* _SYSTEM_MANAGER_S10_ */ +#endif /* _SYSTEM_MANAGER_SOC64_H_ */