From: Lars Povlsen lars.povlsen@microsemi.com
This enables the use of the MSCC serial GPIO driver on the MSCC VCoreIII 'ocelot' SOC, and add gpio-leds nodes to the pcb123 and pcb120 DT.
Signed-off-by: Lars Povlsen lars.povlsen@microsemi.com --- arch/mips/dts/mscc,ocelot.dtsi | 25 +++++++++++ arch/mips/dts/ocelot_pcb120.dts | 76 +++++++++++++++++++++++++++++++++ arch/mips/dts/ocelot_pcb123.dts | 25 +++++++++++ 3 files changed, 126 insertions(+)
diff --git a/arch/mips/dts/mscc,ocelot.dtsi b/arch/mips/dts/mscc,ocelot.dtsi index 87b4736285..e22bd2c949 100644 --- a/arch/mips/dts/mscc,ocelot.dtsi +++ b/arch/mips/dts/mscc,ocelot.dtsi @@ -37,6 +37,12 @@ clock-frequency = <500000000>; };
+ sys_clk: sys-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <250000000>; + }; + ahb_clk: ahb-clk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -118,6 +124,11 @@ #gpio-cells = <2>; gpio-ranges = <&gpio 0 0 22>;
+ sgpio_pins: sgpio-pins { + pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3"; + function = "sg0"; + }; + uart_pins: uart-pins { pins = "GPIO_6", "GPIO_7"; function = "uart"; @@ -148,5 +159,19 @@ function = "si"; }; }; + + sgpio: gpio@10700f8 { + compatible = "mscc,ocelot-sgpio"; + status = "disabled"; + clocks = <&sys_clk>; + pinctrl-0 = <&sgpio_pins>; + pinctrl-names = "default"; + reg = <0x10700f8 0x100>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&sgpio 0 0 64>; /* 32*<sgpio-bitcount> */ + mscc,sgpio-frequency = <12500000>; + mscc,sgpio-bitcount = <2>; + }; }; }; diff --git a/arch/mips/dts/ocelot_pcb120.dts b/arch/mips/dts/ocelot_pcb120.dts index 47d305a614..658719e684 100644 --- a/arch/mips/dts/ocelot_pcb120.dts +++ b/arch/mips/dts/ocelot_pcb120.dts @@ -9,4 +9,80 @@ / { model = "Ocelot PCB120 Reference Board"; compatible = "mscc,ocelot-pcb120", "mscc,ocelot"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + poe_green { + label = "pcb120:green:poe"; + gpios = <&sgpio 44 1>; /* p12.1 */ + default-state = "off"; + }; + + poe_red { + label = "pcb120:red:poe"; + gpios = <&sgpio 12 1>; /* p12.0 */ + default-state = "off"; + }; + + alarm_green { + label = "pcb120:green:alarm"; + gpios = <&sgpio 45 1>; /* p13.1 */ + default-state = "off"; + }; + + alarm_red { + label = "pcb120:red:alarm"; + gpios = <&sgpio 13 1>; /* p13.0 */ + default-state = "off"; + }; + + dc_a_green { + label = "pcb120:green:dc_a"; + gpios = <&sgpio 46 1>; /* p14.1 */ + default-state = "off"; + }; + + dc_a_red { + label = "pcb120:red:dc_a"; + gpios = <&sgpio 14 1>; /* p14.0 */ + default-state = "off"; + }; + + dc_b_green { + label = "pcb120:green:dc_b"; + gpios = <&sgpio 47 1>; /* p15.1 */ + default-state = "off"; + }; + + dc_b_red { + label = "pcb120:red:dc_b"; + gpios = <&sgpio 15 1>; /* p15.0 */ + default-state = "off"; + }; + + status_green { + label = "pcb120:green:status"; + gpios = <&sgpio 48 1>; /* p16.1 */ + default-state = "on"; + }; + + status_red { + label = "pcb120:red:alarm"; + gpios = <&sgpio 16 1>; /* p16.0 */ + default-state = "off"; + }; + + }; + +}; + +&sgpio { + status = "okay"; + mscc,sgpio-ports = <0x000FFFFF>; }; + diff --git a/arch/mips/dts/ocelot_pcb123.dts b/arch/mips/dts/ocelot_pcb123.dts index 17d8d326ce..c4cb7a1194 100644 --- a/arch/mips/dts/ocelot_pcb123.dts +++ b/arch/mips/dts/ocelot_pcb123.dts @@ -9,4 +9,29 @@ / { model = "Ocelot PCB123 Reference Board"; compatible = "mscc,ocelot-pcb123", "mscc,ocelot"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + status_green { + label = "pcb123:green:status"; + gpios = <&sgpio 43 1>; /* p11.1 */ + default-state = "on"; + }; + + status_red { + label = "pcb123:red:status"; + gpios = <&sgpio 11 1>; /* p11.0 */ + default-state = "off"; + }; + }; +}; + +&sgpio { + status = "okay"; + mscc,sgpio-ports = <0x00FFFFFF>; };