Re: [U-Boot] [PATCH 1/5] fsl-ddr: update the bit mask for DDR3 controller

On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu daveliu@freescale.com wrote:

According to the latest 8572 UM, the DDR3 controller is expanding the bit mask, and we use the extend ACTTOPRE mode when tRAS more than 19 MCLK.

Signed-off-by: Dave Liu daveliu@freescale.com

Applied to 85xx-next, thanks

Andy