Instead of waiting for a fixed period of time and hoping for the best that the DRAM will start, read back an EMI status register which tells us exactly when the DRAM started.
Signed-off-by: Marek Vasut marex@denx.de Cc: Stefano Babic sbabic@denx.de --- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
NOTE: It's interesting that Freescale failed to document this register in the i.MX23 datasheet, thus this part is undocumented.
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index de8841a..97ef67d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -274,7 +274,13 @@ static void mx23_mem_init(void) setbits_le32(MXS_DRAM_BASE + 0x20, 1 << 16);
clrbits_le32(MXS_DRAM_BASE + 0x40, 1 << 17); - early_delay(20000); + + /* Wait for EMI_STAT bit DRAM_HALTED */ + for (;;) { + if (!(readl(MXS_EMI_BASE + 0x10) & (1 << 1))) + break; + early_delay(1000); + }
/* Adjust EMI port priority. */ clrsetbits_le32(0x80020000, 0x1f << 16, 0x2);