Hi Bin,
On Mon, Nov 1, 2021 at 2:11 PM Bin Meng bmeng.cn@gmail.com wrote:
Hi Padmarao,
On Fri, Oct 22, 2021 at 4:58 PM Padmarao Begari padmarao.begari@microchip.com wrote:
The device tree split into .dtsi and .dts files, common device node for eMMC/SD, enable I2C1, UART1 for console instead of UART0, enable the DDR 2GB memory and in that 288MB memory is reserved for fabric buffer.
Signed-off-by: Padmarao Begari padmarao.begari@microchip.com
arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 518 ++++------------ arch/riscv/dts/microchip-mpfs.dtsi | 571 ++++++++++++++++++ .../microchip-mpfs-plic.h | 195 ++++++ .../interrupt-controller/riscv-hart.h | 18 + 4 files changed, 913 insertions(+), 389 deletions(-) create mode 100644 arch/riscv/dts/microchip-mpfs.dtsi create mode 100644
include/dt-bindings/interrupt-controller/microchip-mpfs-plic.h
create mode 100644 include/dt-bindings/interrupt-controller/riscv-hart.h
Are these files sync'ed from upstream Linux kernel?
No, We are going to submit these files to the upstream Linux kernel very soon.
Regards Padmarao
[snip]
Regards, Bin