This adds a simple pmic driver for the hi6553 pmic which is used in conjunction with the hi6220 SoC on the hikey board. Eventually this driver will be updated to be a proper UCLASS PMIC driver which can parse the voltages direct from device tree.
Signed-off-by: Peter Griffin peter.griffin@linaro.org --- drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pmic_hi6553.c | 133 +++++++++++++++++++++++++++++++++++++++ include/power/hi6553_pmic.h | 79 +++++++++++++++++++++++ 3 files changed, 213 insertions(+) create mode 100644 drivers/power/pmic/pmic_hi6553.c create mode 100644 include/power/hi6553_pmic.h
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index ae86f04..21e9535 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -20,3 +20,4 @@ obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o obj-$(CONFIG_POWER_TPS65218) += pmic_tps62362.o obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o +obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o diff --git a/drivers/power/pmic/pmic_hi6553.c b/drivers/power/pmic/pmic_hi6553.c new file mode 100644 index 0000000..0af7987 --- /dev/null +++ b/drivers/power/pmic/pmic_hi6553.c @@ -0,0 +1,133 @@ +/* + * Copyright (C) 2015 Linaro + * Peter Griffin peter.griffin@linaro.org + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <asm/io.h> +#include <common.h> +#include <power/pmic.h> +#include <power/max8997_muic.h> +#include <power/hi6553_pmic.h> +#include <errno.h> + +u8 *pmussi_base; + +uint8_t hi6553_readb(u32 offset) +{ + return readb(pmussi_base + (offset << 2)); +} + +void hi6553_writeb(u32 offset, uint8_t value) +{ + writeb(value, pmussi_base + (offset << 2)); +} + +int pmic_reg_write(struct pmic *p, u32 reg, u32 val) +{ + if (check_reg(p, reg)) + return -1; + + hi6553_writeb(reg, (uint8_t)val); + + return 0; +} + +int pmic_reg_read(struct pmic *p, u32 reg, u32 *val) +{ + if (check_reg(p, reg)) + return -1; + + *val = (u32)hi6553_readb(reg); + + return 0; +} + +static void hi6553_init(void) +{ + int data; + + hi6553_writeb(HI6553_PERI_EN_MARK, 0x1e); + hi6553_writeb(HI6553_NP_REG_ADJ1, 0); + data = HI6553_DISABLE6_XO_CLK_CONN | HI6553_DISABLE6_XO_CLK_NFC | + HI6553_DISABLE6_XO_CLK_RF1 | HI6553_DISABLE6_XO_CLK_RF2; + hi6553_writeb(HI6553_DISABLE6_XO_CLK, data); + + /* configure BUCK0 & BUCK1 */ + hi6553_writeb(HI6553_BUCK01_CTRL2, 0x5e); + hi6553_writeb(HI6553_BUCK0_CTRL7, 0x10); + hi6553_writeb(HI6553_BUCK1_CTRL7, 0x10); + hi6553_writeb(HI6553_BUCK0_CTRL5, 0x1e); + hi6553_writeb(HI6553_BUCK1_CTRL5, 0x1e); + hi6553_writeb(HI6553_BUCK0_CTRL1, 0xfc); + hi6553_writeb(HI6553_BUCK1_CTRL1, 0xfc); + + /* configure BUCK2 */ + hi6553_writeb(HI6553_BUCK2_REG1, 0x4f); + hi6553_writeb(HI6553_BUCK2_REG5, 0x99); + hi6553_writeb(HI6553_BUCK2_REG6, 0x45); + mdelay(1); + hi6553_writeb(HI6553_VSET_BUCK2_ADJ, 0x22); + mdelay(1); + + /* configure BUCK3 */ + hi6553_writeb(HI6553_BUCK3_REG3, 0x02); + hi6553_writeb(HI6553_BUCK3_REG5, 0x99); + hi6553_writeb(HI6553_BUCK3_REG6, 0x41); + hi6553_writeb(HI6553_VSET_BUCK3_ADJ, 0x02); + mdelay(1); + + /* configure BUCK4 */ + hi6553_writeb(HI6553_BUCK4_REG2, 0x9a); + hi6553_writeb(HI6553_BUCK4_REG5, 0x99); + hi6553_writeb(HI6553_BUCK4_REG6, 0x45); + + /* configure LDO20 */ + hi6553_writeb(HI6553_LDO20_REG_ADJ, 0x50); + + hi6553_writeb(HI6553_NP_REG_CHG, 0x0f); + hi6553_writeb(HI6553_CLK_TOP0, 0x06); + hi6553_writeb(HI6553_CLK_TOP3, 0xc0); + hi6553_writeb(HI6553_CLK_TOP4, 0x00); + + /* configure LDO7 & LDO10 for SD slot */ + data = hi6553_readb(HI6553_LDO7_REG_ADJ); + data = (data & 0xf8) | 0x2; + hi6553_writeb(HI6553_LDO7_REG_ADJ, data); + mdelay(5); + /* enable LDO7 */ + hi6553_writeb(HI6553_ENABLE2_LDO1_8, 1 << 6); + mdelay(5); + data = hi6553_readb(HI6553_LDO10_REG_ADJ); + data = (data & 0xf8) | 0x5; + hi6553_writeb(HI6553_LDO10_REG_ADJ, data); + mdelay(5); + /* enable LDO10 */ + hi6553_writeb(HI6553_ENABLE3_LDO9_16, 1 << 1); + mdelay(5); + + /* select 32.764KHz */ + hi6553_writeb(HI6553_CLK19M2_600_586_EN, 0x01); +} + +int power_hi6553_init(u8 *base) +{ + static const char name[] = "HI6553 PMIC"; + struct pmic *p = pmic_alloc(); + + if (!p) { + printf("%s: POWER allocation error!\n", __func__); + return -ENOMEM; + } + + p->name = name; + p->interface = PMIC_NONE; + p->number_of_regs = 44; + pmussi_base = base; + + hi6553_init(); + + puts("HI6553 PMIC init\n"); + + return 0; +} diff --git a/include/power/hi6553_pmic.h b/include/power/hi6553_pmic.h new file mode 100644 index 0000000..fcd131a --- /dev/null +++ b/include/power/hi6553_pmic.h @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2015 Linaro + * Peter Griffin peter.griffin@linaro.org + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __HI6553_PMIC_H__ +#define __HI6553_PMIC_H__ + +/* Registers */ +enum { + HI6553_VERSION_REG = 0x000, + HI6553_ENABLE2_LDO1_8 = 0x029, + HI6553_DISABLE2_LDO1_8, + HI6553_ONOFF_STATUS2_LDO1_8, + HI6553_ENABLE3_LDO9_16, + HI6553_DISABLE3_LDO9_16, + HI6553_ONOFF_STATUS3_LDO9_16, + + HI6553_DISABLE6_XO_CLK = 0x036, + HI6553_PERI_EN_MARK = 0x040, + HI6553_BUCK2_REG1 = 0x04a, + HI6553_BUCK2_REG5 = 0x04e, + HI6553_BUCK2_REG6, + + HI6553_BUCK3_REG3 = 0x054, + HI6553_BUCK3_REG5 = 0x056, + HI6553_BUCK3_REG6, + HI6553_BUCK4_REG2 = 0x05b, + HI6553_BUCK4_REG5 = 0x05e, + HI6553_BUCK4_REG6, + + HI6553_CLK_TOP0 = 0x063, + HI6553_CLK_TOP3 = 0x066, + HI6553_CLK_TOP4, + HI6553_VSET_BUCK2_ADJ = 0x06d, + HI6553_VSET_BUCK3_ADJ, + HI6553_LDO7_REG_ADJ = 0x078, + HI6553_LDO10_REG_ADJ = 0x07b, + HI6553_LDO19_REG_ADJ = 0x084, + HI6553_LDO20_REG_ADJ, + HI6553_DR_LED_CTRL = 0x098, + HI6553_DR_OUT_CTRL, + HI6553_DR3_ISET, + HI6553_DR3_START_DEL, + HI6553_DR4_ISET, + HI6553_DR4_START_DEL, + HI6553_DR345_TIM_CONF0 = 0x0a0, + HI6553_NP_REG_ADJ1 = 0x0be, + HI6553_NP_REG_CHG = 0x0c0, + HI6553_BUCK01_CTRL2 = 0x0d9, + HI6553_BUCK0_CTRL1 = 0x0dd, + HI6553_BUCK0_CTRL5 = 0x0e1, + HI6553_BUCK0_CTRL7 = 0x0e3, + HI6553_BUCK1_CTRL1 = 0x0e8, + HI6553_BUCK1_CTRL5 = 0x0ec, + HI6553_BUCK1_CTRL7 = 0x0ef, + HI6553_CLK19M2_600_586_EN = 0x0fe, +}; + +#define HI6553_DISABLE6_XO_CLK_BB (1 << 0) +#define HI6553_DISABLE6_XO_CLK_CONN (1 << 1) +#define HI6553_DISABLE6_XO_CLK_NFC (1 << 2) +#define HI6553_DISABLE6_XO_CLK_RF1 (1 << 3) +#define HI6553_DISABLE6_XO_CLK_RF2 (1 << 4) + +#define HI6553_LED_START_DELAY_TIME 0x00 +#define HI6553_LED_ELEC_VALUE 0x07 +#define HI6553_LED_LIGHT_TIME 0xf0 +#define HI6553_LED_GREEN_ENABLE (1 << 1) +#define HI6553_LED_OUT_CTRL 0x00 + +#define HI6553_PMU_V300 0x30 +#define HI6553_PMU_V310 0x31 + +int power_hi6553_init(u8 *base); + +#endif /* __HI6553_PMIC_H__ */