On Monday 06 October 2008, Adam Graham wrote:
After changing SDRAM_CLKTR phase value rerun the memory preload initialization sequence (INITPLR) to reset and relock the memory DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing adjustment effects the phase relationship of the internal, to the PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
Applied ppc4xx/master. Thanks.
Best regards, Stefan
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