[U-Boot] [PATCH 6/7] spi: cadence_qspi: Fix CQSPI_CAL_DELAY calculation

This change copes with the delay being less than a SCLK period.

Signed-off-by: Phil Edworthy phil.edworthy@renesas.com --- drivers/spi/cadence_qspi_apb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index a0edeb8..533274d 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -170,7 +170,7 @@ CQSPI_REG_CONFIG_IDLE_LSB) & 0x1)

#define CQSPI_CAL_DELAY(tdelay_ns, tref_ns, tsclk_ns) \ - ((((tdelay_ns) - (tsclk_ns)) / (tref_ns))) + ((tdelay_ns) > (tsclk_ns)) ? ((((tdelay_ns) - (tsclk_ns)) / (tref_ns))) : 0

#define CQSPI_GET_RD_SRAM_LEVEL(reg_base) \ (((readl(reg_base + CQSPI_REG_SDRAMLEVEL)) >> \