Add initial reset driver for Allwinner A83T.
Implement reset deassert and assert functions for USB OHCI, EHCI, OTG and PHY bus reset and clock registers.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/reset/sunxi/Kconfig | 7 ++ drivers/reset/sunxi/Makefile | 1 + drivers/reset/sunxi/reset_a83t.c | 117 +++++++++++++++++++++++++++++++ 3 files changed, 125 insertions(+) create mode 100644 drivers/reset/sunxi/reset_a83t.c
diff --git a/drivers/reset/sunxi/Kconfig b/drivers/reset/sunxi/Kconfig index ce1215d9a8..578351305e 100644 --- a/drivers/reset/sunxi/Kconfig +++ b/drivers/reset/sunxi/Kconfig @@ -37,6 +37,13 @@ config RESET_SUN8I_A23 This enables common reset driver support for platforms based on Allwinner A23/A33 SoC.
+config RESET_SUN8I_A83T + bool "Reset driver for Allwinner A83T" + default MACH_SUN8I_A83T + help + This enables common reset driver support for platforms based + on Allwinner A83T SoC. + config RESET_SUN8I_H3 bool "Reset driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/reset/sunxi/Makefile b/drivers/reset/sunxi/Makefile index 97452a275c..58b2f7df9f 100644 --- a/drivers/reset/sunxi/Makefile +++ b/drivers/reset/sunxi/Makefile @@ -8,5 +8,6 @@ obj-$(CONFIG_RESET_SUN4I_A10) += reset_a10.o obj-$(CONFIG_RESET_SUN5I_A10S) += reset_a10s.o obj-$(CONFIG_RESET_SUN6I_A31) += reset_a31.o obj-$(CONFIG_RESET_SUN8I_A23) += reset_a23.o +obj-$(CONFIG_RESET_SUN8I_A83T) += reset_a83t.o obj-$(CONFIG_RESET_SUN8I_H3) += reset_h3.o obj-$(CONFIG_RESET_SUN50I_A64) += reset_a64.o diff --git a/drivers/reset/sunxi/reset_a83t.c b/drivers/reset/sunxi/reset_a83t.c new file mode 100644 index 0000000000..c9a11fe15a --- /dev/null +++ b/drivers/reset/sunxi/reset_a83t.c @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 Amarula Solutions B.V. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <reset-uclass.h> +#include <asm/io.h> +#include <dm/lists.h> +#include <dt-bindings/reset/sun8i-a83t-ccu.h> + +struct a83t_reset_priv { + void *base; +}; + +static int a83t_reset_request(struct reset_ctl *reset_ctl) +{ + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + /* check dt-bindings/reset/sun8i-a83t-ccu.h for max id */ + if (reset_ctl->id > 44) + return -EINVAL; + + return 0; +} + +static int a83t_reset_free(struct reset_ctl *reset_ctl) +{ + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + return 0; +} + +static int a83t_reset_assert(struct reset_ctl *reset_ctl) +{ + struct a83t_reset_priv *priv = dev_get_priv(reset_ctl->dev); + + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + switch (reset_ctl->id) { + case RST_USB_PHY0: + case RST_USB_PHY1: + case RST_USB_HSIC: + clrbits_le32(priv->base + 0xcc, BIT(reset_ctl->id)); + return 0; + case RST_BUS_OTG: + clrbits_le32(priv->base + 0x2c0, BIT(24)); + return 0; + case RST_BUS_EHCI0: + case RST_BUS_EHCI1: + clrbits_le32(priv->base + 0x2c0, + BIT(26 + (reset_ctl->id - RST_BUS_EHCI0))); + return 0; + case RST_BUS_OHCI0: + clrbits_le32(priv->base + 0x60, BIT(29)); + return 0; + default: + debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id); + return -ENODEV; + } +} + +static int a83t_reset_deassert(struct reset_ctl *reset_ctl) +{ + struct a83t_reset_priv *priv = dev_get_priv(reset_ctl->dev); + + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + switch (reset_ctl->id) { + case RST_USB_PHY0: + case RST_USB_PHY1: + case RST_USB_HSIC: + setbits_le32(priv->base + 0xcc, BIT(reset_ctl->id)); + return 0; + case RST_BUS_OTG: + setbits_le32(priv->base + 0x2c0, BIT(24)); + return 0; + case RST_BUS_EHCI0: + case RST_BUS_EHCI1: + setbits_le32(priv->base + 0x2c0, + BIT(26 + (reset_ctl->id - RST_BUS_EHCI0))); + return 0; + case RST_BUS_OHCI0: + setbits_le32(priv->base + 0x60, BIT(29)); + return 0; + default: + debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id); + return -ENODEV; + } +} + +struct reset_ops a83t_reset_ops = { + .request = a83t_reset_request, + .free = a83t_reset_free, + .rst_assert = a83t_reset_assert, + .rst_deassert = a83t_reset_deassert, +}; + +static int a83t_reset_probe(struct udevice *dev) +{ + struct a83t_reset_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + + return 0; +} + +U_BOOT_DRIVER(reset_sun8i_a83t) = { + .name = "sun8i_a83t_reset", + .id = UCLASS_RESET, + .ops = &a83t_reset_ops, + .probe = a83t_reset_probe, + .priv_auto_alloc_size = sizeof(struct a83t_reset_priv), +};