Since the GPIOx_OTYPER register has only one bit for every pin, the width and shift has to be corrected. --- drivers/gpio/stm32_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c index 50f86d3..2457211 100644 --- a/drivers/gpio/stm32_gpio.c +++ b/drivers/gpio/stm32_gpio.c @@ -66,7 +66,7 @@ int stm32_gpio_config(const struct stm32_gpio_dsc *dsc, i = dsc->pin * 2;
clrsetbits_le32(&gpio_regs->moder, 0x3 << i, ctl->mode << i); - clrsetbits_le32(&gpio_regs->otyper, 0x3 << i, ctl->otype << i); + clrsetbits_le32(&gpio_regs->otyper, 0x1 << dsc->pin, ctl->otype << dsc->pin); clrsetbits_le32(&gpio_regs->ospeedr, 0x3 << i, ctl->speed << i); clrsetbits_le32(&gpio_regs->pupdr, 0x3 << i, ctl->pupd << i);