30 Nov
2016
30 Nov
'16
1:34 a.m.
On 28 November 2016 at 02:34, Lokesh Vutla lokeshvutla@ti.com wrote:
Add support for enabling d-cache in SPL. The sequence in SPL tries to replicate the sequence done in U-Boot except that MMU entries were added for SRAM.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com
arch/arm/include/asm/cache.h | 1 + arch/arm/lib/cache-cp15.c | 46 +++++++++++++++++++++++++++++++--------- arch/arm/mach-omap2/omap-cache.c | 15 +++++++++++++ common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++ 4 files changed, 92 insertions(+), 10 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org