From: Daniel Schwierzeck daniel.schwierzeck@googlemail.com
Au1x00 is a SoC and its specific code should reside in an own SoC subdirectory.
Signed-off-by: Daniel Schwierzeck daniel.schwierzeck@googlemail.com Shinya Kuribayashi skuribay@pobox.com --- arch/mips/cpu/mips32/Makefile | 2 - arch/mips/cpu/mips32/au1x00/Makefile | 45 ++++++++++++++++++++ arch/mips/cpu/mips32/{ => au1x00}/au1x00_eth.c | 0 arch/mips/cpu/mips32/{ => au1x00}/au1x00_serial.c | 0 .../mips/cpu/mips32/{ => au1x00}/au1x00_usb_ohci.c | 0 .../mips/cpu/mips32/{ => au1x00}/au1x00_usb_ohci.h | 0 arch/mips/cpu/mips32/au1x00/config.mk | 22 ++++++++++ boards.cfg | 14 +++--- 8 files changed, 74 insertions(+), 9 deletions(-) create mode 100644 arch/mips/cpu/mips32/au1x00/Makefile rename arch/mips/cpu/mips32/{ => au1x00}/au1x00_eth.c (100%) rename arch/mips/cpu/mips32/{ => au1x00}/au1x00_serial.c (100%) rename arch/mips/cpu/mips32/{ => au1x00}/au1x00_usb_ohci.c (100%) rename arch/mips/cpu/mips32/{ => au1x00}/au1x00_usb_ohci.h (100%) create mode 100644 arch/mips/cpu/mips32/au1x00/config.mk
diff --git a/arch/mips/cpu/mips32/Makefile b/arch/mips/cpu/mips32/Makefile index 88e3023..e315c1b 100644 --- a/arch/mips/cpu/mips32/Makefile +++ b/arch/mips/cpu/mips32/Makefile @@ -29,8 +29,6 @@ START = start.o SOBJS-y = cache.o COBJS-y = cpu.o interrupts.o
-COBJS-$(CONFIG_SOC_AU1X00) += au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o - SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) START := $(addprefix $(obj),$(START)) diff --git a/arch/mips/cpu/mips32/au1x00/Makefile b/arch/mips/cpu/mips32/au1x00/Makefile new file mode 100644 index 0000000..dc58475 --- /dev/null +++ b/arch/mips/cpu/mips32/au1x00/Makefile @@ -0,0 +1,45 @@ +# +# (C) Copyright 2011 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).o + +COBJS = au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/mips/cpu/mips32/au1x00_eth.c b/arch/mips/cpu/mips32/au1x00/au1x00_eth.c similarity index 100% rename from arch/mips/cpu/mips32/au1x00_eth.c rename to arch/mips/cpu/mips32/au1x00/au1x00_eth.c diff --git a/arch/mips/cpu/mips32/au1x00_serial.c b/arch/mips/cpu/mips32/au1x00/au1x00_serial.c similarity index 100% rename from arch/mips/cpu/mips32/au1x00_serial.c rename to arch/mips/cpu/mips32/au1x00/au1x00_serial.c diff --git a/arch/mips/cpu/mips32/au1x00_usb_ohci.c b/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c similarity index 100% rename from arch/mips/cpu/mips32/au1x00_usb_ohci.c rename to arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c diff --git a/arch/mips/cpu/mips32/au1x00_usb_ohci.h b/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.h similarity index 100% rename from arch/mips/cpu/mips32/au1x00_usb_ohci.h rename to arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.h diff --git a/arch/mips/cpu/mips32/au1x00/config.mk b/arch/mips/cpu/mips32/au1x00/config.mk new file mode 100644 index 0000000..3516213 --- /dev/null +++ b/arch/mips/cpu/mips32/au1x00/config.mk @@ -0,0 +1,22 @@ +# +# (C) Copyright 2011 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# diff --git a/boards.cfg b/boards.cfg index 0eb5b90..493fe86 100644 --- a/boards.cfg +++ b/boards.cfg @@ -217,17 +217,17 @@ M5282EVB m68k mcf52x2 m5282evb freesca M53017EVB m68k mcf52x2 m53017evb freescale EP2500 m68k mcf52x2 ep2500 Mercury microblaze-generic microblaze microblaze microblaze-generic xilinx -dbau1000 mips mips32 dbau1x00 - - dbau1x00:DBAU1000 -dbau1100 mips mips32 dbau1x00 - - dbau1x00:DBAU1100 -dbau1500 mips mips32 dbau1x00 - - dbau1x00:DBAU1500 -dbau1550 mips mips32 dbau1x00 - - dbau1x00:DBAU1550 -dbau1550_el mips mips32 dbau1x00 - - dbau1x00:DBAU1550 -gth2 mips mips32 +dbau1000 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1000 +dbau1100 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1100 +dbau1500 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1500 +dbau1550 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 +dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 +gth2 mips mips32 - - au1x00 incaip mips mips32 incaip - incaip incaip_100MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=100000000 incaip_133MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=133000000 incaip_150MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=150000000 -pb1000 mips mips32 pb1x00 - - pb1x00:PB1000 +pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000 purple mips mips32 - - purple qemu_mips mips mips32 qemu-mips - - qemu-mips tb0229 mips mips32