Hi: all,
This patch depends on the series patches(http://patchwork.ozlabs.org/patch/567250/).
Regards
Wenbin Song
-----Original Message----- From: Wenbin Song [mailto:wenbin.song@nxp.com] Sent: Wednesday, January 20, 2016 8:26 PM To: yorksun@freescale.com; Mingkai Hu mingkai.hu@nxp.com; Qianyu Gong qianyu.gong@nxp.com; Shaohui Xie shaohui.xie@nxp.com; Wenbin Song wenbin.song@nxp.com; u-boot@lists.denx.de; bmeng.cn@gmail.com Cc: Shaohui Xie Shaohui.Xie@freescale.com; Mingkai Hu Mingkai.Hu@freescale.com Subject: [PATCH v2 1/3] armv8/ls1043aqds: Select lpuart pins of various muxes
From: Shaohui Xie Shaohui.Xie@freescale.com
Set Board Configuration Register to select the lpuart pins of various muxes.
Signed-off-by: Shaohui Xie Shaohui.Xie@freescale.com Signed-off-by: Mingkai Hu Mingkai.Hu@freescale.com --- board/freescale/ls1043aqds/ls1043aqds.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..4e38cb0 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -40,6 +40,9 @@ enum { #define CFG_SD_MUX3_MUX4 0x1 /* MUX4 */ #define CFG_SD_MUX4_SLOT3 0x0 /* SLOT3 TX/RX1 */ #define CFG_SD_MUX4_SLOT1 0x1 /* SLOT1 TX/RX3 */ +#define CFG_UART_MUX_MASK 0x6 +#define CFG_UART_MUX_SHIFT 1 +#define CFG_LPUART_EN 0x1
int checkboard(void) { @@ -218,7 +221,19 @@ void board_retimer_init(void)
int board_early_init_f(void) { +#ifdef CONFIG_LPUART + u8 uart; +#endif fsl_lsch2_early_init_f(); +#ifdef CONFIG_LPUART + /* + * we use lpuart1 as system console. + */ + uart = QIXIS_READ(brdcfg[14]); + uart &= ~CFG_UART_MUX_MASK; + uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT; + QIXIS_WRITE(brdcfg[14], uart); +#endif
return 0; } -- 2.1.0.27.g96db324