
6 Jan
2014
6 Jan
'14
5:53 p.m.
On 01/06/2014 01:26 AM, Shengzhou Liu wrote:
- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are unrelated to DDR3/3L.
Signed-off-by: Shengzhou Liu Shengzhou.Liu@freescale.com
board/freescale/t2080qds/ddr.c | 12 ++------ board/freescale/t2080qds/ddr.h | 65 +++++++++++++++++------------------------- 2 files changed, 28 insertions(+), 49 deletions(-)
First, please remember to update the version number when you submit an updated patch. Second, please add change log.
Please add information about tested conditions, including DIMM model and speed.
York